Staff Structural Test Verification/Simulation Engineer
Arm · Posted Oct 19
Semiconductor IP, energy-efficient CPU architecture, and high-performance compute platforms
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About the role
Arm is a semiconductor IP company whose processor and system designs are used across advanced silicon products. This Staff Structural Test Verification/Simulation Engineer role sits within the structural test and design-for-test (DFT) area, acting as a technical authority for pre-silicon verification and simulation of logic and memory test architectures. The role drives ATPG and MBIST pattern simulation, DFT tool and standard integration using Tessent/TetraMAX, and bridges pre-silicon work with post-silicon silicon validation and yield debug.
What you will do
- DFT Verification Leadership: Define and drive the comprehensive pre-silicon verification and simulation strategy for advanced logic and memory test architectures.
- Logic Diagnostics & ATPG: Drive the simulation of ATPG (Automatic Test Pattern Generation) patterns and logic diagnostics flows to guarantee fault coverage and defect detection.
- Memory Diagnostics & MBIST: Drive the simulation of MBIST (Memory Built-In Self-Test) controllers, memory repair algorithms, and memory diagnostics architectures.
- Tool & Standard Integration: Utilize industry-standard test methodologies and EDA tools ( ICL, PDL, Tessent, and TetraMAX ) to validate DFT insertions, boundary scan, and scan compression logic.
- Silicon Validation & Yield Debug: Bridge pre-silicon simulation with post-silicon testing, collaborating closely with manufacturing and test engineering teams on silicon validation and yield debug to root-cause failures and optimize test efficiency.
Skills used in this role
What the employer is looking for
- Experience: 10+ years of extensive experience in design-for-test (DFT), structural test verification, or test engineering for complex ASICs/SoCs.
- Core DFT Skills: Expert-level understanding of Logic Diagnostics and ATPG pattern verification/simulation .
- Deep expertise in Memory Diagnostics and MBIST pattern verification/simulation .
- Ecosystem & Tool Proficiency: Hands-on mastery of industry-standard DFT languages and tools, including ICL (Instrument Connection Language), PDL (Procedure Description Language), Siemens Tessent, and Synopsys TetraMAX .
- Post-Silicon Execution: Demonstrated track record in silicon validation, ATE pattern bring-up, and yield debug for high-volume semiconductor manufacturing.
- Methodologies & Coding: Strong background in hardware verification languages (SystemVerilog/UVM) and scripting automation (Python, Perl, or Tcl).
Preferred qualifications
- Exceptional technical leadership, mentoring skills, and ability to drive cross-functional engineering execution across global sites.
- Deep knowledge of advanced process nodes (sub-7nm/5nm/3nm) and low-power DFT challenges.
- Experience with IJTAG (IEEE 1687) and boundary-scan (IEEE 1149.1/4) standards.
Benefits and support
- Compensation and benefits are detailed in the job posting
About Arm
Arm architects, develops, and licenses high-performance, energy-efficient CPU products and related semiconductor intellectual property. Its technology powers over 99% of the world's smartphones as well as a vast array of devices ranging from tiny sensors and wearables to cloud-scale AI supercomputers.
- Industry
- Semiconductors
- Company size
- 8000+ employees
- Founded
- 1990
- Location
- Cambridge, United Kingdom
- Funding stage
- Public Company
Funding
Public Company
- 2023-09-14IPO$5.23B
Leadership
Chief Executive Officer, Board Member
Executive Vice President and Chief Financial Officer
Executive Vice President, Chief Legal Officer and Head of Corporate Development
Executive Vice President and Chief Commercial Officer
Executive Vice President and Chief Architect
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