Staff Functional Test Verification/Simulation Engineer
Arm · Posted Oct 19
Semiconductor IP, energy-efficient CPU architecture, and high-performance compute platforms
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About the role
Arm is seeking an experienced Staff Functional Test Verification/Simulation Engineer for its Bangalore engineering hub. The role leads pre-silicon verification and simulation of next-generation Arm CPU/GPU architectures, covering functional coverage, test porting, testbench development, pattern generation, silicon validation, and debug closure. It uses UVM, SystemVerilog, C/C++, Python automation, and industry EDA simulators.
What you will do
- Architecture & Subsystem Verification: Spearhead verification/simulation strategies for advanced Arm CPU/GPU designs by partnering with Design/DV to identify the target functional coverage for silicon on top of structural coverage.
- Test Porting & Simulation: Drive functional, datapath, and performance test case porting and execution across intensive simulation platforms.
- Testbench Development: Design and Scalable, reusable UVM, SystemVerilog, and C-based testbenches and stimulus generation infrastructures.
- Pattern Generation & Silicon Validation: Build advanced pattern generation and simulation flows , and bridge pre-silicon simulation with post-silicon validation to correlate performance and functional expectations on real silicon.
- Coverage & Debug Closure: Own functional coverage analysis, System , debugging complex multi-domain RTL, testbench, and system-level issues efficiently using Python automation.
Skills used in this role
What the employer is looking for
- Experience: 9-13 years of proven hands-on experience in complex SoC verification.
- Domain Expertise: Solid working knowledge of Arm CPU/GPU architecture , instruction sets, and high-performance datapath pipelines.
- Methodologies & Languages: Advanced proficiency in SystemVerilog, UVM, and C/C++ co-simulation or testbench creation. Strong scripting capabilities in Python for test automation, data analysis, and regression tracking.
- Verification Scope: Proven expertise in executing functional/performance stress test cases, pattern generation, simulation, and silicon validation handoffs.
- Simulation Tools: Deep familiarity with industry-standard EDA simulators and debug ecosystems (e.g., Synopsys VCS, Cadence Xcelium/Palladium, Siemens Questa).
Preferred qualifications
- Deep understanding of AMBA protocols (CHI, AXI, AHB) and internal memory hierarchies.
- Experience with power-aware verification, emulation, or performance modeling.
- Strong interpersonal skills with a track record of driving cross-functional alignment across global engineering sites.
Benefits and support
- Hybrid working patterns
About Arm
Arm architects, develops, and licenses high-performance, energy-efficient CPU products and related semiconductor intellectual property. Its technology powers over 99% of the world's smartphones as well as a vast array of devices ranging from tiny sensors and wearables to cloud-scale AI supercomputers.
- Industry
- Semiconductors
- Company size
- 8000+ employees
- Founded
- 1990
- Location
- Cambridge, United Kingdom
- Funding stage
- Public Company
Funding
Public Company
- 2023-09-14IPO$5.23B
Leadership
Chief Executive Officer, Board Member
Executive Vice President and Chief Financial Officer
Executive Vice President, Chief Legal Officer and Head of Corporate Development
Executive Vice President and Chief Commercial Officer
Executive Vice President and Chief Architect
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