
STA Engineer - EDA/CAD Flow : Software Development Engineer
AMD · Posted Oct 8
High-performance processors, graphics cards, data center solutions, and AI accelerators
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About the role
AMD designs next-generation processors and technologies spanning AI, scientific discovery, and everyday computing. This role sits in the EDA/CAD flow area, focused on static timing analysis and digital design for AMD's industry-leading silicon products. The engineer will create complex designs, debug place-and-route issues, and drive designs to timing closure.
What you will do
- RTL coding styles
- STA and Timing Constraint Concepts
- Place and route algoritms and applications.
- The candidate will be responsible for creating complex designs, debugging P & R issues and will work to achieve timing closure.
Skills used in this role
What the employer is looking for
- The ideal candidate should have a strong background in RTL design using Verilog/VHDL and strong exposure to timing closure concepts with foundations in timing analysis & digital design.
- BS or MS in EE or CE with 2-3 years of experience in Digital Design and Static Timing Analysis
Preferred qualifications
- Scripting language such as TCL, Perl or Python
- EDA tools and flow
- Familiarity with Linux and modern software tools and techniques for development
- Good analytical and problem-solving skills
Benefits and support
- Compensation and benefits are detailed in the job posting
About AMD
AMD is a global semiconductor company that designs high-performance central processing units (CPUs), graphics processing units (GPUs), and adaptive processors for data centers, personal computers, gaming consoles, and embedded systems. The company specializes in advanced computing solutions and AI accelerators, positioning itself as a major leader in modern high-performance and artificial intelligence hardware. Through strategic developments and acquisitions, AMD continues to expand its ecosystem across cloud infrastructure, enterprise computing, and physical AI.
- Industry
- Semiconductors
- Company size
- 31000 employees
- Founded
- 1969-05-01
- Location
- Santa Clara, California, USA
- Funding stage
- Public Company
Funding
Public Company
- 2007-11-16Post Ipo
Leadership
Chair and Chief Executive Officer
Executive Vice President, Chief Financial Officer and Treasurer
Executive Vice President and Chief Technology Officer
Executive Vice President and Chief Commercial Officer
Executive Vice President and General Manager, Data Center Solutions Business Group
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