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Server Structural FEA Engineer

Qualcomm · Posted Oct 29

Semiconductor, 5G wireless technology, mobile platform, and AI computing solutions

Santa Clara, California, United States of America, Bangalore, India, Cork, Ireland, Republic of China - Remote TWN, TaiwanFull-timeOnsiteLead/Staff10+ years₹55.0L–₹95.0L yearly71 applicants
SemiconductorsWireless TechnologyTelecommunicationsArtificial IntelligenceMobile ComputingPublic Company
Full time

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About the role

Qualcomm's Data Center team develops high-performance, energy-efficient server solutions and reference platforms based on Qualcomm Snapdragon SoCs. The role focuses on structural integrity and reliability of server SoCs and semiconductor packages using advanced finite element analysis, covering soldered and socketed packages, chip-package interaction, warpage, solder-joint reliability, and package-to-platform mechanical interactions. The engineer will develop predictive models, correlate simulations with test data, and provide design guidance across package, thermal, mechanical, reliability, and platform teams.

What you will do

  • Develop and apply advanced structural and thermo-mechanical FEA methodologies for server SoCs and advanced semiconductor packages, including CPI, package assembly, warpage, stress, deformation, and structural reliability.
  • Evaluate both soldered and socketed packages under package assembly, SMT, socket and retention loading, cooling-system loading, temperature cycling, qualification, and operating conditions.
  • Analyze package-to-platform mechanical interaction among the SoC package, PCB, socket or retention system, heatsink or cold plate, and thermal interface materials, including TIM1.5.
  • Apply advanced FEA techniques including submodeling, contact analysis, material and geometric nonlinearity, viscoelasticity, creep, fatigue, fracture or damage mechanics, and coupled structural-thermal analysis as appropriate.
  • Develop physics-based reliability and life-prediction models for relevant failure mechanisms, including solder and bump fatigue, die and BEOL stress, substrate and interposer cracking, delamination, and creep. Perform BLR and solder-joint reliability analyses to quantify damage accumulation, design margins, and expected life.
  • Perform sensitivity, uncertainty, and bounding analyses to identify dominant parameters, quantify structural risk, and guide package and platform architecture decisions before hardware is available.
  • Define model-validation and correlation strategies using material characterization, package/board measurements, reliability and qualification testing, manufacturing data, and system-level test results, including development of test vehicles and methods where needed.
  • Partner with package engineering and computational modeling teams to align modeling assumptions, material properties, process inputs, boundary conditions, revision control, correlation methodologies, and failure criteria.
  • Develop independent analyses, sensitivity studies, or targeted model cross-checks as needed to reconcile differing predictions, quantify uncertainty, and evaluate server-specific package-to-platform boundary conditions.
  • Work closely with system/platform structural-analysis engineers to provide package mechanical properties, load limits, deformation behavior, and failure criteria supporting broader platform, system, and rack-level lifecycle analyses.
  • Apply expertise in package architectures and substrate technologies, including FCBGA, FCLGA/HFCBGA, chiplet-based designs, HBM integration, 2.5D interposers or bridges, and 3D packaging technologies.
  • Develop scalable workflows, automation, modeling standards, best-known methods (BKMs), and validation frameworks. Experience with ANSYS APDL-based workflow development is strongly preferred.
  • Translate complex simulation results into clear design requirements and recommendations for cross-functional engineering teams, leadership, customers, and suppliers.

Skills used in this role

What the employer is looking for

  • Master's degree in Mechanical Engineering, Engineering Mechanics, Materials Science, Physics, or a related field.
  • 10+ years of advanced FEA experience in semiconductor packaging, microelectronics assembly, CPI, structural reliability, and interconnect technologies.
  • Strong foundation in structural and failure mechanics, materials science, thermo-mechanical behavior, fatigue and creep, with experience applying nonlinear FEA techniques including contact, submodeling, thermal cycling, and interconnect reliability analysis.
  • Demonstrated experience modeling semiconductor-package failure mechanisms and correlating simulations with experimental, manufacturing, or qualification data.
  • Proficiency in ANSYS Workbench, ANSYS APDL, ABAQUS, or equivalent nonlinear FEA tools.
  • Proven ability to operate independently and lead in cross-functional environments, with strong technical documentation, communication, and presentation skills.
  • Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 6+ years of Systems Engineering or related work experience. OR Master's degree in Engineering, Information Systems, Computer Science, or related field and 5+ years of Systems Engineering or related work experience. OR PhD in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.

Preferred qualifications

  • Ph.D. in Mechanical Engineering, Engineering Mechanics, Materials Science, Physics, or a related field.
  • Deep expertise in package mechanics, CPI, package assembly simulation, warpage prediction, die and BEOL reliability, and solder or interconnect reliability.
  • Demonstrated experience with both soldered and socketed high-pin-count server packages and package interaction with PCBs, sockets, retention hardware, heatsinks or cold plates, and TIM materials.
  • Proven experience developing physics-based reliability models and life predictions for solder joints, bumps, die/package structures, substrates, interposers, underfill, adhesives, or related failure mechanisms.
  • Proven simulation-to-test correlation using warpage measurements, strain or displacement measurements, material characterization, thermal-cycling data, mechanical loading tests, or qualification results.
  • Experience developing APDL automation, reusable workflows, modeling standards, and BKMs.
  • Experience with coupled structural-thermal analysis and mechanical/thermal co-optimization.
  • Understanding of server and OCP platform designs and associated assembly, handling, transportation, qualification, and operating environments.

Benefits and support

  • Compensation and benefits are detailed in the job posting

About Qualcomm

Qualcomm is a global leader in the development and commercialization of foundational technologies for the wireless industry, including mobile processors, 5G, and on-device artificial intelligence. The company designs and markets digital communications products, semiconductor solutions, and system software used globally across smartphones, automotive solutions, IoT devices, and computing systems. Through extensive R&D and intellectual property licensing, Qualcomm powers a highly interconnected and smarter world.

Industry
Semiconductors
Company size
50000+ employees
Founded
1985
Location
San Diego, California, USA
Funding stage
Public Company

Funding

Public Company · $53M raised

Western Technology Investment
  • 2018-11-01Grant

Leadership

CR
Cristiano R. Amon

President and Chief Executive Officer

AP
Akash Palkhiwala

Chief Financial Officer and Chief Operating Officer

JH

James H. Thompson

Chief Technology Officer

DM
Don McGuire

Chief Marketing Officer

AC

Ann Chaplin

General Counsel and Corporate Secretary

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