Senior/Staff NAND Design Rule Engineer
Micron · Posted Sep 25
DRAM, NAND, HBM memory and computer data storage solutions
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About the role
Micron Technology is a leader in innovating memory and storage solutions, and this role sits within Process Integration in the Storage Technology Group. The team drives next-generation 3D NAND development, working across process integration, design, CAD and physical verification groups. As a Senior/Staff NAND Design Rule Engineer, you will define physical design rules for current and future Non-Volatile Memory technologies from conception to production ramp, evaluate layout and architecture feasibility, and develop automated and agentic solutions for design rule coverage and mask data generation.
What you will do
- Define physical design rules for current and future Non-Volatile Memory (NVM) technologies from conception to full production ramp.
- Interact with process integration team to keep all technology developments up to date, to ensure DR's are accurate.
- Interact with design teams to evaluate the feasibility of different layout and architecture options (i.e., design rule and process limitations).
- Develop automated solutions and agentic capabilities to ensure sufficient design rule coverage, accuracy and consistency with other technology collaterals.
- Interact across multi-disciplinary teams to understand product and test structure failures and their interaction with layout and mask generated data
- Support design rule checking (DRC) of both base and mask layers and interface with physical verification team.
- Define algorithms for generation of mask data from drawn base layer data.
- Involve projects across multi-disciplinary teams focusing on layout and mask generation issues
Skills used in this role
What the employer is looking for
- Master’s or PhD degree with at least 3 years of experience in the semiconductor industry in the areas of Process Integration, Yield Enhancement, Product Engineering, Test Structure Development, or Unit Process Development.
- Strong semiconductor device physics and VLSI silicon processing and integration flow knowledge.
- Proven ability to develop code and agentic solutions using Python or other industry standard programming languages or tools such as Claudecode.
- Exposure to design, design rule & layout, ability to do minor layout and experience with CAD tools like Cadence Virtuoso, K2view, and Mentor Graphics DRV/RVE is required.
- Familiarity with CAD group interactions, data post-processing, and the process of transferring data from the database to the reticle.
- Strong knowledge of advanced semiconductor process flow, the scaling issues of memory (non-volatile/volatile memory technologies) from device and product perspectives, as well as the function and purpose of major NAND components, such as BL sensing, Word-line driver, and CMOS under array.
- Strong communication skills (written, verbal and presentation).
Benefits and support
- Compensation and benefits are detailed in the job posting
About Micron
Micron Technology, Inc. is a world leader in innovative memory and storage solutions, manufacturing DRAM, NAND, NOR, and High Bandwidth Memory (HBM) technologies. The company provides foundational computing capabilities for artificial intelligence, 5G, data centers, and consumer electronics worldwide. Headquartered in Boise, Idaho, Micron plays a critical role in powering next-generation computing architectures.
- Industry
- Semiconductors
- Company size
- 56,000 employees
- Founded
- October 5, 1978
- Location
- Boise, Idaho, USA
- Funding stage
- Public Company
Leadership
Chairman and Chief Executive Officer
Executive Vice President and Chief Financial Officer
President and Chief Operating Officer
President and Chief Technology and Products Officer
Executive Vice President and Chief People Officer
Senior Vice President, Chief Legal Officer and Corporate Secretary