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Senior Silicon Design Verification Engineer, Google Cloud

Google · Posted Oct 27

Search engine, cloud computing, software, hardware, and artificial intelligence services

Gurugram, Haryana, IndiaFull-timeOnsiteSenior Level8+ years₹40.0L–₹70.0L yearly<25 applicants
InternetCloud ComputingSoftwareHardwareArtificial IntelligenceAdvertisingPublic Company
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About the role

The AI and Infrastructure team builds custom silicon and infrastructure that powers Google's direct-to-consumer products, Google Cloud services, and hyperscale computing including TPUs and global networking. The role sits in digital design verification for silicon solutions, working with design engineers on RTL-level verification flows. This engineer will plan verification of digital design blocks, build constrained-random SystemVerilog/UVM environments, apply formal tools and coverage metrics, and drive debug through tape-out.

What you will do

  • Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
  • Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology. Verify designs with SystemVerilog Assertions and industry leading formal tools.
  • Identify and write all types of coverage measures for stimulus and corner-cases.
  • Debug tests with design engineers to deliver functionally correct design blocks.
  • Close coverage measures to identify verification holes and to show progress towards tape-out.

Skills used in this role

SystemVerilogUVMSystemVerilog AssertionsFormal VerificationSpecman eFPGAASICRTLVerificationDebuggingCoverage AnalysisComputer ArchitectureNetworkingPacket ProcessingIP/Subsystem/SoC VerificationAI/ML AcceleratorsVector Processing Units

What the employer is looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 8 years of experience in Verification, verifying digital logic at RTL level using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or ASICs.
  • Experience in verification and debug of IP/subsystem/SoCs in the networking domain such as packet processing, bandwidth management, and congestion control.
  • Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).

Preferred qualifications

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience with performance verification of ASICs and ASIC components.
  • Experience with ASIC standard interfaces and memory system architecture.
  • Experience in artificial intelligence/machine learning (AI/ML) accelerators or vector processing units.

Benefits and support

  • Compensation and benefits are detailed in the job posting

About Google

Google LLC is an American multinational technology company focusing on artificial intelligence, online advertising, search engine technology, cloud computing, computer software, quantum computing, e-commerce, and consumer electronics. As a subsidiary of Alphabet Inc., it is widely recognized for services like Google Search, YouTube, Android, and the Gemini AI ecosystem.

Industry
Internet
Company size
180000+ employees
Founded
1998-09-04
Location
Mountain View, California, USA
Funding stage
Public Company

Funding

Public Company · $25M raised

Kleiner PerkinsSequoia Capital
  • 1999-06-07Series A$25M

Leadership

SP
Sundar Pichai

Chief Executive Officer

AA
Anat Ashkenazi

Senior Vice President and Chief Financial Officer

PS
Philipp Schindler

Senior Vice President and Chief Business Officer

TK
Thomas Kurian

Chief Executive Officer, Google Cloud

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