Program Management Engineer
Texas Instruments · Posted Nov 3
Semiconductor design, manufacturing, and analog chip solutions
Bengaluru, Karnataka, IndiaFull-timeOnsiteSenior Level5+ years₹35.0L–₹60.0L yearly<25 applicants
SemiconductorsElectronics ManufacturingAnalog ChipsEmbedded ProcessorsHardwarePublic Company
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About the role
Texas Instruments' Embedded Processing Silicon IP Group is seeking a Technical Program Manager to join its IP Development team. The team delivers silicon IP blocks reused across five major SoC platforms, spanning AI accelerators, compute clusters, security, communications and audio, networking, control and sense, and platform infrastructure. The role drives planning, execution, and delivery of complex IP programs across design, licensing, SoC interception, and cross-functional engineering initiatives.
What you will do
- AI Accelerators: Program management for neural network inference engine IP development — covering compute datapath, memory hierarchy, and scalability across TOPS targets. Coordinate hardware-software co-design milestones for Edge AI workloads including transformers, SLMs, and time-series sensor inference. Track INT8/FP8/BF16/FP32 feature delivery and vector streaming engine tape-out readiness.
- Compute Clusters: Drive program execution for multi-core processor cluster IP based on ARM Cortex-M/R/A or RISC-V families. Manage schedules for cluster topology definition, cache coherency implementation, inter-processor communication, and power/performance sign-off milestones.
- Security: Coordinate delivery of Hardware Security Module (HSM) IP spanning low-to-mid-to-high segment products. Track crypto IP integration, secure boot architecture milestones, key management deliverables, and certification timelines (ISO 21434, IEC 62443). Manage Caliptra support and security software driver framework schedules.
- Communications & Audio: Manage program timelines for high-speed and low-power communication IP blocks including USB, Ethernet, CAN-FD, LIN, and audio subsystems. Track interface specification approvals, PHY integration milestones, and protocol compliance verification schedules for industrial and automotive applications.
- Networking: Drive program execution for on-chip networking fabrics, Ethernet switch subsystems, TSN (Time-Sensitive Networking), and functional safety-aware interconnects. Manage QoS, traffic shaping, and real-time determinism validation milestones for industrial automation and automotive networking programs.
- Control & Sense: Coordinate delivery of analog-digital interface IP including ADCs, DACs, comparators, timers, PWM engines, and sensor interface blocks. Track mixed-signal integration milestones, calibration architecture reviews, and functional safety (IEC 61508 / ISO 26262) compliance certification schedules for motor control and industrial sensing applications.
- Platform & Infrastructure: Manage program execution for foundational SoC infrastructure IP: power management, clock/reset distribution, DMA engines, memory controllers, debug/trace subsystems, and boot infrastructure. Drive IP reuse strategy milestones and platform IP standardisation across product families.
- Lead end-to-end program management for IP development, licensing, and portfolio initiatives across multiple IP domain verticals, teams, and geographies.
- Define program scope, goals, milestones, and success metrics in collaboration with IP Domain Leads, Chip Architects, and stakeholders.
- Develop and maintain detailed program plans, schedules, risk registers, and status reports for each IP domain vertical.
- Drive cross-functional alignment across silicon design (RTL, DV, Physical Design), software, legal, and business development teams.
- Identify, track, and mitigate program risks and dependencies proactively across IP domain verticals.
- Manage IP reuse program schedules to ensure timely delivery of reusable IP blocks across five major SoC platforms.
- Coordinate tape-out readiness reviews and sign-off activities across IP domain verticals.
- Serve as the primary point of contact for program status, escalations, and executive reporting across all IP domain verticals.
- Prepare and present program updates, dashboards, and roadmaps to leadership, including domain-specific PPA and schedule health metrics.
- Facilitate cross-team meetings across IP domain verticals, drive decisions, and ensure clear action item ownership and follow-through.
- Communicate architectural and schedule trade-offs to senior leadership with clarity and data-driven recommendations.
- Define and implement scalable processes and tools for IP program tracking and reporting across domain verticals.
- Drive continuous improvement in program execution efficiency and quality across the IP development lifecycle.
- Establish best practices for IP program management, including reuse metrics, coverage tracking, and tape-out readiness criteria.
- Champion process standardisation across IP domain verticals to enable consistent delivery quality and predictable schedules.
Skills used in this role
What the employer is looking for
- 5+ years of experience in technical program management, preferably in semiconductor, EDA, or IP licensing environments.
- Strong understanding of semiconductor IP across multiple domain verticals — processor cores, AI accelerators, security HSMs, communication IPs, networking fabrics, analog-digital interface IPs, and SoC infrastructure.
- Demonstrated experience managing complex, multi-stakeholder programs with cross-functional teams spanning RTL design, verification, physical design, and software.
- Familiarity with SoC development lifecycle: architecture definition, RTL implementation, verification, physical design, and tape-out.
- Understanding of IP reuse strategies and multi-platform SoC product families.
- Excellent organisational, communication, and presentation skills.
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or a related field.
Preferred qualifications
- Background in silicon design (RTL) or verification (DV) is a strong plus.
- Experience with IP licensing or open-source IP ecosystems (e.g., RISC-V, Caliptra).
- Experience with ARM Cortex-M/R/A, RISC-V, or other processor IP ecosystems.
- Familiarity with functional safety standards (IEC 61508, ISO 26262, ISO 21434, IEC 62443) and their impact on IP development schedules and certification milestones.
- Knowledge of AI/ML accelerator IP development and Edge AI workload requirements.
- Experience managing communication or networking IP programs (USB, Ethernet, CAN-FD, TSN).
- Familiarity with PPA (Power, Performance, Area) trade-off frameworks and their program management implications.
- Proficiency in program management tools and dashboards (Jira, Confluence, MS Project, or equivalent).
Benefits and support
- Compensation and benefits are detailed in the job posting
About Texas Instruments
Texas Instruments Incorporated is a global semiconductor company that designs, manufactures, tests, and sells analog and embedded processing chips for industrial, automotive, personal electronics, and communications markets. The company enables customers to efficiently manage power, accurately sense and transmit data, and provide core control in diverse electronic applications. Known for its historical innovations including the integrated circuit and commercial silicon transistors, Texas Instruments continues to be a major technology provider worldwide.
- Industry
- Semiconductors
- Company size
- 33,000+ employees
- Founded
- 1930
- Location
- Dallas, Texas, USA
- Funding stage
- Public Company
Leadership
HI
Haviv Ilan
Chairman, President and Chief Executive Officer
RL
Rafael Lizardi
Senior Vice President and Chief Financial Officer
AB
Ahmad Bahai
Senior Vice President and Chief Technology Officer
KP
Krunali Patel
Senior Vice President and Chief Information Officer
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