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Principal Engineer, ASIC Physical Design

Micron · Posted Oct 1

DRAM, NAND, HBM memory and computer data storage solutions

Hyderabad, Telangana, IndiaFull-timeOnsiteLead/Staff15+ years₹80.0L–₹1.4Cr yearly76 applicants
SemiconductorsHardwareComputer MemoryData StorageArtificial IntelligencePublic Company
Full time

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About the role

Micron Technology is a global leader in innovative memory and storage solutions, delivering DRAM, NAND, and NOR products across data center, intelligent edge, client, and mobile markets. The Enterprise SSD Group works on processors, controller architectures, and ASICs for enterprise SSD products. This Principal Engineer role owns ASIC physical design implementation, covering block-level low power aware floorplanning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, IR/EM analysis, physical verification, and tapeout.

What you will do

  • The team member will typically work on processors, controller architectures or ASICs for Enterprise SSD Group. Should be proficient in block level low power aware floorplanning, placement, clock tree synthesis, routing, RC extraction, STA timing closure, IR/EM analysis, DRC/LVS/ERC and tape out activities.

Skills used in this role

Ansys RedHawk-SCCadence InnovusCadence TempusCalibreClaudeMicrosoft CopilotPhysical DesignAPR Flow DevelopmentPPA AnalysisSTAIR/EM AnalysisRC ExtractionClock Tree SynthesisDRCLVSERCFormal VerificationDigital ElectronicsMicroprocessorsCommunicationProblem SolvingAnalytical SkillsCollaborationTime ManagementLeadership

What the employer is looking for

  • Minimum of 15 years of hands-on physical design implementation/IR/EM experience along with APR flow development and PPA analysis
  • STA closure at block & Full Chip
  • Experience in Advanced process technology nodes (5nm/3nm preferred)
  • Experience with Ansys Redhawk-SC tool
  • Experience with Cadence layout tools (Innovus, Tempus, etc..)
  • Hands on work experience in Physical verification closure (DRC/LVS/Antenna) with Caliber tool
  • Experience in closing all the IR issues within the block & Full chip based on feedback
  • Should be strong in fundamentals of digital electronics and microprocessors
  • Should have very good analytical skills
  • Should be able to Lead strong team independently for sub-system partitions closure deliverables
  • Should be proficient in using AI skill for PD closure activities (Claude/MS Copilot)
  • Required soft skills – English language proficiency, Good collaboration and interpersonal skills. Good analytical and Problem-solving skills along with strong ownership, commitment and time management.
  • Bachelor’s or Masters with a relevant education is in the field of electronics and computer architecture

Preferred qualifications

  • Strong verbal communication skills
  • Cadence PnR tools
  • Formal verification experience
  • Digital electronics and microprocessors experience

Benefits and support

  • Compensation and benefits are detailed in the job posting

About Micron

Micron Technology, Inc. is a world leader in innovative memory and storage solutions, manufacturing DRAM, NAND, NOR, and High Bandwidth Memory (HBM) technologies. The company provides foundational computing capabilities for artificial intelligence, 5G, data centers, and consumer electronics worldwide. Headquartered in Boise, Idaho, Micron plays a critical role in powering next-generation computing architectures.

Industry
Semiconductors
Company size
56,000 employees
Founded
October 5, 1978
Location
Boise, Idaho, USA
Funding stage
Public Company

Leadership

SM
Sanjay Mehrotra

Chairman and Chief Executive Officer

MM
Mark Murphy

Executive Vice President and Chief Financial Officer

MB
Manish Bhatia

President and Chief Operating Officer

SJ
Scott J. DeBoer

President and Chief Technology and Products Officer

AA
April Arnzen

Executive Vice President and Chief People Officer

MR
Michael Ray

Senior Vice President, Chief Legal Officer and Corporate Secretary