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Pre/Post Silicon Validation Engineer with PMIC Expertise

Qualcomm · Posted Oct 30

Semiconductor, 5G wireless technology, mobile platform, and AI computing solutions

Bangalore, IndiaFull-timeOnsiteSenior Level4–8 years₹30.0L–₹50.0L yearly41 applicants
SemiconductorsWireless TechnologyTelecommunicationsArtificial IntelligenceMobile ComputingPublic Company
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About the role

Qualcomm’s SoC Silicon Validation Engineering group performs silicon-level hardware architectural validation to uncover design implementation bugs through pre- and post-silicon system-level validation. The role focuses on validating Power Management Integrated Circuits (PMICs) from the SoC perspective, including the SoC–PMIC control interface, sleep/wake and power sequencing flows, and power delivery infrastructure. The engineer will define and execute SoC-level use cases, debug complex power issues on silicon using lab tools, and work with cross-functional teams to ensure robust SoC power management.

What you will do

  • Develop and execute validation plans and coverage, leveraging expertise in PMICs to enhance system-level validation strategies.
  • SoC–PMIC interface validation: Validate the SPMI (or similar, e.g., I2C/I3C) controller, PMIC arbiter and protocol behavior, including command sequences, arbitration across multiple masters, register access, interrupt handling and error/fault scenarios.
  • Sleep/wake and power sequencing: Define and execute scenarios covering power-on/power-off, reset, sleep entry/exit and wake-up sequences, including rail ramp/retention/collapse, clock (XO) handling, PMIC mode transitions and wake sources such as interrupts, RTC alarms and key presses.
  • Rail and regulator validation: Validate SoC-driven voltage scaling (DVFS/AVS), regulator mode switching (e.g., PWM/PFM, low-power/high-power), slew rates, settling times and voltage margins across supply rails.
  • Collaborate closely with cross-functional teams (SoC design, PMIC design/systems, power architecture, firmware and software) to validate power management subsystems and SoC Power infrastructure.
  • Measure and analyze power/performance characteristics of SoCs, with a focus on PMIC integration, rail-level current, sleep floor current and transition behavior.
  • Create random stress stimulus validation frameworks, incorporating PMIC scenarios (concurrent rail transitions, repeated sleep/wake cycles, load transients, interface traffic) to test system resilience and reliability.
  • Debug and root-cause silicon failures using lab tools, waveform captures and protocol traces; clearly document issues and drive them to closure with design and firmware teams.
  • Contribute to pre-silicon validation (emulation/FPGA platforms) to ensure PMIC-related scenarios are ready ahead of silicon arrival.

Skills used in this role

What the employer is looking for

  • Bachelor's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
  • Bachelor's/Master's in Electrical/Electronic Engineering or Computer Engineering.
  • 4-8 years of relevant industry experience in PMICs, defining and executing SOC level use cases and scenarios.
  • PMIC internals: Strong understanding of buck/SMPS regulators, LDOs, operating modes, power-on/power-off logic, PMIC GPIOs, ADCs, RTC, temperature alarms and protection mechanisms (OCP, OVP, UVLO).
  • Interface and protocol: Hands-on experience with SPMI or similar controllers and protocols (I2C/I3C), including PMIC arbitration, register access and interrupt flows.
  • Sleep/wake sequences: Good understanding of SoC–PMIC power sequencing, system sleep/wake flows, rail retention/collapse, and the role of power management controllers/firmware in these transitions.
  • Proven experience interfacing with Power Management IC, DVFS, and system low power modes.
  • Proficiency in C & Python programming for content development and scripting.
  • Familiarity with ARM SoC concepts and architecture specifications like SMMU, GIC, Coresight.
  • Lab tools: Strong debugging skills, with hands-on experience using Lab Equipment such as Oscilloscopes, Logic Analyzers, Protocol Analyzers (SPMI/I2C), Power Analyzers/Source Measure Units, DMMs, Electronic Loads, Current Probes and Lauterbach debuggers.
  • Excellent communication, interpersonal, and problem-solving skills, with the ability to quickly adapt to new environments and technologies.

Preferred qualifications

  • Experience with multi-PMIC platforms, PMIC-related firmware (boot, power management controller firmware) and Linux/RTOS power management drivers.
  • Exposure to board-level power delivery, schematics review and power-integrity concepts (load transients, droop, ripple).
  • Knowledge of thermal and limits management (temperature sensing, current limiting, throttling) and battery/charger subsystems.
  • Experience with lab automation and data analysis using Python for instrument control and large-scale regression.
  • Exposure to pre-silicon validation on emulation/FPGA platforms.

Benefits and support

  • Compensation and benefits are detailed in the job posting

About Qualcomm

Qualcomm is a global leader in the development and commercialization of foundational technologies for the wireless industry, including mobile processors, 5G, and on-device artificial intelligence. The company designs and markets digital communications products, semiconductor solutions, and system software used globally across smartphones, automotive solutions, IoT devices, and computing systems. Through extensive R&D and intellectual property licensing, Qualcomm powers a highly interconnected and smarter world.

Industry
Semiconductors
Company size
50000+ employees
Founded
1985
Location
San Diego, California, USA
Funding stage
Public Company

Funding

Public Company · $53M raised

Western Technology Investment
  • 2018-11-01Grant

Leadership

CR
Cristiano R. Amon

President and Chief Executive Officer

AP
Akash Palkhiwala

Chief Financial Officer and Chief Operating Officer

JH

James H. Thompson

Chief Technology Officer

DM
Don McGuire

Chief Marketing Officer

AC

Ann Chaplin

General Counsel and Corporate Secretary

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