PNR CAD SILICON DESIGN ENGINEER
AMD · Posted Oct 5
High-performance processors, graphics cards, data center solutions, and AI accelerators
Get a personal compatibility score
Add a resume for personal matches
About the role
AMD is a leader in GPU and CPU technology, and this CAD role sits within the silicon design organization that builds next-generation processors. The team develops and supports synthesis, place and route implementation flows and methodologies for advanced technology nodes such as 3nm and 2nm, working with large global design teams and EDA vendors. The successful candidate will own automation of PnR flows, drive PPA convergence for SOC implementation, and support design teams across multiple flow stages from netlist to GDSII.
What you will do
- Responsible for developing Place and Route methodologies for various designs at advanced technology nodes
- Work seamlessly with synthesis and signoff (STA, extraction, Physical Verification) teams to achieve best-in-class PPA
- Drive power/performance/area (PPA) convergence for SOCs implementation
- Script out utilities to automate different stages of the implementation flow
- Support design teams at global sites through multiple PnR flow stages including chip finish flows
- CAD flow and Methodology development on advanced process nodes such as 3nm, 2nm are preferred
Skills used in this role
What the employer is looking for
- This position for a CAD Engineer will be critical to shaping the next generation AMD products, the leader in GPU, CPU. It requires interfacing with large design teams across the globe and owning development & support for next generation synthesis, place and route flows. Successful candidate would be responsible for automation of PnR flows and methodologies for the 3nm & 2nm technology nodes as well as working closely with the EDA vendors to identify innovative solutions and track methodology issues.
- You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems
- Master’s/Bachelor’s Degree in Electronics Engineering (Minor in Computer Science preferred)
- 8-10 years of experience in CAD flow and methodology development on advanced nodes such as 3nm & 2nm
- Work closely with design teams to support multiple areas through Netlist to GDSII implementation
- Strong problem-solving skills and analytical thinking
- Team player, good work ethic, and excellent communication skills
Preferred qualifications
- Hands‑on experience in PNR flows including multi-voltage & power-gated designs
- Expertise with industry‑standard physical design tools Innovus & Fusion Compiler
- Experience with synthesis, STA, Physical verification domains is a plus
- Strong understanding of low-power flows includes UPF concepts, power-gating, isolation, level-shifter, voltage areas, power-state tables, electrical checks using FM & VSI
- Proficiency in scripting and automation using Python, TCL with strong debugging capabilities and CAD‑automation mindset.
- Exposure to AI/ML concepts, with strong Python proficiency.
- CAD and Automation mindset
Benefits and support
- Compensation and benefits are detailed in the job posting
About AMD
AMD is a global semiconductor company that designs high-performance central processing units (CPUs), graphics processing units (GPUs), and adaptive processors for data centers, personal computers, gaming consoles, and embedded systems. The company specializes in advanced computing solutions and AI accelerators, positioning itself as a major leader in modern high-performance and artificial intelligence hardware. Through strategic developments and acquisitions, AMD continues to expand its ecosystem across cloud infrastructure, enterprise computing, and physical AI.
- Industry
- Semiconductors
- Company size
- 31000 employees
- Founded
- 1969-05-01
- Location
- Santa Clara, California, USA
- Funding stage
- Public Company
Funding
Public Company
- 2007-11-16Post Ipo
Leadership
Chair and Chief Executive Officer
Executive Vice President, Chief Financial Officer and Treasurer
Executive Vice President and Chief Technology Officer
Executive Vice President and Chief Commercial Officer
Executive Vice President and General Manager, Data Center Solutions Business Group
Recent coverage
Taipei Times
AMD to 'Substantially' Up Capacity: CEO2026-10-07
AMD Newsroom
AMD to Report Fiscal Third Quarter 2026 Financial Results2026-10-06
Venture Atlas
AMD Agrees to Buy World Labs for About $8.2 Billion2026-09-29