Physical Design Lead(High Speed IP's)
AMD · Posted Oct 5
High-performance processors, graphics cards, data center solutions, and AI accelerators
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About the role
AMD's CT Physical Design team drives physical implementation of industry-leading high-speed interface IPs, including DDR, LPDDR, GDDR, PCIe, and other next-generation mixed-signal PHY solutions used across client, server, and graphics products. The role is a senior technical leadership position working on advanced process nodes toward aggressive PPA, frequency, power, and schedule goals. The engineer will work with architects, circuit designers, RTL, package, power integrity, signal integrity, SoC, and methodology teams to define and implement innovative physical design solutions, while mentoring engineers and driving methodology and automation improvements.
What you will do
- Lead physical design implementation of complex high-speed IPs such as DDR/LPDDR/GDDR PHYs, PCIe, SerDes, and related subsystems.
- Own end-to-end implementation activities
- Drive high-frequency timing closure for challenging datapaths and clock distribution networks.
- Partner with architects and circuit designers to optimize PHY architectures for performance, power, and implementation efficiency.
- Develop and deploy innovative implementation methodologies to improve design quality, productivity, and scalability.
- Collaborate with cross-functional teams including Architecture, RTL, AMS, Package, SI/PI, Product Engineering, SoC, CAD, and EDA vendors.
- Provide technical leadership for multiple projects and influence implementation strategies across organizational boundaries.
- Mentor junior engineers and help grow the technical capability of the organization.
- Drive continuous improvement initiatives in automation, AI-assisted design methodologies, and signoff flows.
Skills used in this role
What the employer is looking for
- Bachelors or Masters degree in computer engineering/Electrical Engineering
Preferred qualifications
- 12+ years of industry experience in Physical Design for advanced semiconductor products.
- Proven track record delivering multiple successful tape-outs on advanced technology nodes (N3/N4/N5 or equivalent).
- Extensive experience with high-performance and high-speed interface IPs
- Deep expertise in one of the fields: Timing, EMIR, clock tree, physical verification
- Expertise with industry-standard EDA tools including Cadence and Synopsys implementation/signoff flows.
- Experience driving methodology development and automation.
- Demonstrated leadership across cross-functional teams and geographies.
Benefits and support
- Compensation and benefits are detailed in the job posting
About AMD
AMD is a global semiconductor company that designs high-performance central processing units (CPUs), graphics processing units (GPUs), and adaptive processors for data centers, personal computers, gaming consoles, and embedded systems. The company specializes in advanced computing solutions and AI accelerators, positioning itself as a major leader in modern high-performance and artificial intelligence hardware. Through strategic developments and acquisitions, AMD continues to expand its ecosystem across cloud infrastructure, enterprise computing, and physical AI.
- Industry
- Semiconductors
- Company size
- 31000 employees
- Founded
- 1969-05-01
- Location
- Santa Clara, California, USA
- Funding stage
- Public Company
Funding
Public Company
- 2007-11-16Post Ipo
Leadership
Chair and Chief Executive Officer
Executive Vice President, Chief Financial Officer and Treasurer
Executive Vice President and Chief Technology Officer
Executive Vice President and Chief Commercial Officer
Executive Vice President and General Manager, Data Center Solutions Business Group
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