Physical Design Engineer
AMD · Posted Oct 5
High-performance processors, graphics cards, data center solutions, and AI accelerators
Get a personal compatibility score
Add a resume for personal matches
About the role
AMD designs processors and technologies spanning AI, healthcare, scientific discovery, and everyday computing. This role sits within ASIC/SoC Physical Design, specializing in Electromigration and IR Drop (EMIR) and power delivery network (PDN) analysis. The engineer will drive EMIR analysis, debug, and signoff closure for high-performance SoC designs using tools such as Ansys RedHawk-SC and Cadence Voltus, while improving EMIR methodologies and automation in collaboration with Physical Design, Power, and Package teams.
What you will do
- Perform static and dynamic IR-drop and Electromigration analysis using industry-standard EMIR tools such as Ansys RedHawk-SC and Cadence Voltus for complex SoC designs.
- Develop, maintain, and validate EMIR flows and analysis setups across different stages of the physical design cycle.
- Perform power-grid validation and identify weak-grid regions, voltage-drop hotspots, current-density violations, and power connectivity issues.
- Validate EMIR database quality and input data integrity, and identify setup or data-related issues that could impact the accuracy and quality of EMIR analysis.
- Perform detailed root-cause analysis of EMIR violations and provide actionable recommendations to Physical Design and other related teams.
- Work closely with Physical Design teams to drive power-grid optimization, via enhancement, metal strengthening, floorplan updates, placement optimization, and ECO-based fixes.
- Analyze EMIR challenges associated with voltage islands, multiple power domains, power-domain boundaries, bump distribution, and power-grid connectivity.
- Identify critical issues early in the design cycle that may require floorplan, bump, or power-grid architecture changes.
- Analyze results across multiple design iterations to identify new violations, regressions, and unexpected changes, and drive them toward resolution.
- Work closely with design teams to determine whether identified EMIR issues can be addressed through ECO changes or require more significant power-grid/design modifications.
- Drive assigned blocks/subsystems toward EMIR signoff and design convergence, while meeting project quality and schedule requirements.
- Develop and improve automation for EMIR flow execution, data processing, analysis, debug, and reporting.
- Collaborate effectively with cross-functional teams and provide technical guidance and support on EMIR related issues.
- Contribute to continuous improvement of EMIR methodologies, checks, best practices, and design closure processes.
Skills used in this role
What the employer is looking for
- You have a passion for silicon design, physical design, and solving complex EMIR challenges. You possess a strong understanding of power delivery networks and the interaction between floorplan, power grid, placement, routing, bumps, power distribution, and design activity.
- You are a team player with excellent communication and collaboration skills and are comfortable working with engineers across different teams, sites, and time zones.
- You have strong analytical and problem-solving skills, with the ability to independently debug complex EMIR issues, identify root causes, propose practical design solutions, and drive issues to closure.
- You are self-motivated, willing to learn, and continuously look for opportunities to improve methodologies, automation, debug efficiency, and overall design convergence.
Preferred qualifications
- 4 +Years of hands-on experience in ASIC/SoC Physical Design with significant experience in EMIR analysis and signoff.
- Strong hands-on experience with Ansys RedHawk-SC and/or Cadence Voltus for Electromigration and IR-drop analysis. Experience with both tools is highly preferred.
- Strong understanding of Power Delivery Networks (PDN), static IR drop, dynamic IR drop, Electromigration, current density, and power-grid reliability.
- Experience with EMIR flow setup, database validation, debug, analysis, and signoff closure.
- Strong understanding of the impact of floorplan, placement, routing, power-grid design, vias, and bumps on EMIR.
- Experience in debugging EMIR violations and providing effective and practical design recommendations for issue resolution.
- Good understanding of multi-voltage designs, voltage islands, and power-domain interactions.
- Experience in power-grid robustness analysis and validation and identifying potential design weaknesses early in the implementation cycle.
- Familiarity with physical design inputs and data such as LEF/DEF, parasitics, power/activity data, technology files, power intent, and design databases.
- Good understanding of the overall ASIC Physical Design flow from floorplanning through implementation, ECO, and signoff.
- Experience with scripting languages such as Python, Tcl, Perl, and/or Shell for flow automation, data analysis, reporting, and productivity improvement.
Benefits and support
- Compensation and benefits are detailed in the job posting
About AMD
AMD is a global semiconductor company that designs high-performance central processing units (CPUs), graphics processing units (GPUs), and adaptive processors for data centers, personal computers, gaming consoles, and embedded systems. The company specializes in advanced computing solutions and AI accelerators, positioning itself as a major leader in modern high-performance and artificial intelligence hardware. Through strategic developments and acquisitions, AMD continues to expand its ecosystem across cloud infrastructure, enterprise computing, and physical AI.
- Industry
- Semiconductors
- Company size
- 31000 employees
- Founded
- 1969-05-01
- Location
- Santa Clara, California, USA
- Funding stage
- Public Company
Funding
Public Company
- 2007-11-16Post Ipo
Leadership
Chair and Chief Executive Officer
Executive Vice President, Chief Financial Officer and Treasurer
Executive Vice President and Chief Technology Officer
Executive Vice President and Chief Commercial Officer
Executive Vice President and General Manager, Data Center Solutions Business Group
Recent coverage
Taipei Times
AMD to 'Substantially' Up Capacity: CEO2026-10-07
AMD Newsroom
AMD to Report Fiscal Third Quarter 2026 Financial Results2026-10-06
Venture Atlas
AMD Agrees to Buy World Labs for About $8.2 Billion2026-09-29