
PD Engineer
AMD · Posted Oct 15
High-performance processors, graphics cards, data center solutions, and AI accelerators
Get a personal compatibility score
Add a resume for personal matches
About the role
AMD's Silicon Design team delivers high-performance ASIC and SoC products, and this role works on physical implementation of digital blocks from netlist to GDSII. The position focuses on meeting timing, power, area, and reliability targets using physical design methodologies, EDA tools, and advanced technology nodes. The engineer will execute floorplanning, power planning, placement, CTS, routing, timing closure, and physical verification, and will collaborate with RTL, Synthesis, DFT, STA, Power, and Verification teams through tapeout signoff.
What you will do
- Perform physical implementation of digital blocks from netlist to GDSII.
- Execute and optimize:
- Floorplanning
- Power Planning
- Placement
- Clock Tree Synthesis (CTS)
- Routing
- Timing Closure
- Physical Verification
- Analyze and close:
- Setup and Hold timing violations
- Signal Integrity issues
- Crosstalk violations
- IR Drop and Electromigration (EM)
- DRC/LVS violations
- Work closely with RTL, Synthesis, DFT, STA, Power, and Verification teams.
- Develop methodologies and automation scripts to improve PD productivity.
- Support tapeout activities and signoff closure.
- Debug physical design issues across advanced technology nodes (5nm/3nm/2nm as applicable).
Skills used in this role
What the employer is looking for
- Bachelor's or Master's degree in:
- Electronics Engineering
- Electrical Engineering
- VLSI Design
- Computer Engineering
- RTL-to-GDSII implementation
- Floorplanning
- Power Grid Design
- Placement Optimization
- CTS
- Routing
- ECO Implementation
- Timing Closure
- Static Timing Analysis (STA)
- OCV/AOCV/POCV concepts
- Multi-mode Multi-corner (MMMC) analysis
- Timing Signoff Closure
- DRC/LVS
- Antenna Checks
- Density Checks
- LEC awareness
- UPF/CPF concepts
- Power gating
- Multi-voltage methodologies
- Retention and Isolation strategies
- Strong scripting skills in:
- Tcl
- Perl
- Python
- Shell scripting
- Experience with one or more:
- ICC2
- Fusion Compiler
- PrimeTime
- StarRC
- IC Validator
- Innovus
- Tempus
- Voltus
- Genus
- Calibre DRC/LVS
Preferred qualifications
- Experience with advanced technology nodes (16nm/7nm/5nm/3nm).
- Knowledge of high-performance DDR, CPU, GPU, PCIE, AI/ML, Networking, or Data Center SoCs.
- Understanding of package and chiplet integration concepts.
- Experience in hierarchical and full-chip implementation flows.
- Strong debugging and problem-solving skills.
- Excellent communication and collaboration abilities.
Benefits and support
- Compensation and benefits are detailed in the job posting
About AMD
AMD is a global semiconductor company that designs high-performance central processing units (CPUs), graphics processing units (GPUs), and adaptive processors for data centers, personal computers, gaming consoles, and embedded systems. The company specializes in advanced computing solutions and AI accelerators, positioning itself as a major leader in modern high-performance and artificial intelligence hardware. Through strategic developments and acquisitions, AMD continues to expand its ecosystem across cloud infrastructure, enterprise computing, and physical AI.
- Industry
- Semiconductors
- Company size
- 31000 employees
- Founded
- 1969-05-01
- Location
- Santa Clara, California, USA
- Funding stage
- Public Company
Funding
Public Company
- 2007-11-16Post Ipo
Leadership
Chair and Chief Executive Officer
Executive Vice President, Chief Financial Officer and Treasurer
Executive Vice President and Chief Technology Officer
Executive Vice President and Chief Commercial Officer
Executive Vice President and General Manager, Data Center Solutions Business Group
Recent coverage
AMD Newsroom
OCP 2026: AMD CEO Lisa Su Highlights Open Infrastructure for the Future of AI2026-10-12
AMD Newsroom
Introducing AMD Helion, Agentic AI Compute at Rack Scale2026-10-12
TweakTown
AMD CEO Lisa Su calls 2026 the 'year of inference' and says the CPU market will grow tenfold to $200B by 20302026-10-14