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PD Engineer

AMD · Posted Oct 15

High-performance processors, graphics cards, data center solutions, and AI accelerators

Bangalore, IndiaFull-timeOnsiteSenior Level4–8 years₹25.0L–₹45.0L yearly<25 applicants
SemiconductorsHardwareArtificial IntelligenceCloud ComputingGamingPublic Company
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About the role

AMD's Silicon Design team builds the high-performance ASIC/SoC products behind the company's processors and AI/data-center platforms. This Physical Design Engineer role will implement high-performance digital blocks from synthesis through tapeout in advanced technology nodes, closing timing, power, area, and reliability targets. The position works closely with RTL, Synthesis, DFT, STA, Power, and Verification teams and also develops automation and methodology flows to improve physical design productivity.

What you will do

  • Perform physical implementation of digital blocks from netlist to GDSII.
  • Execute and optimize:
  • Floorplanning
  • Power Planning
  • Placement
  • Clock Tree Synthesis (CTS)
  • Routing
  • Timing Closure
  • Physical Verification
  • Analyze and close:
  • Setup and Hold timing violations
  • Signal Integrity issues
  • Crosstalk violations
  • IR Drop and Electromigration (EM)
  • DRC/LVS violations
  • Work closely with RTL, Synthesis, DFT, STA, Power, and Verification teams.
  • Develop methodologies and automation scripts to improve PD productivity.
  • Support tapeout activities and signoff closure.
  • Debug physical design issues across advanced technology nodes (5nm/3nm/2nm as applicable).

Skills used in this role

TclPerlPythonShell ScriptingICC2Fusion CompilerPrimeTimeStarRCIC ValidatorInnovusTempusVoltusGenusCalibreUPFCPFStatic Timing Analysis (STA)DRC/LVSLECClock Tree Synthesis (CTS)FloorplanningPlacementRoutingElectromigrationIR Drop

What the employer is looking for

  • Bachelor's or Master's degree in:
  • Electronics Engineering
  • Electrical Engineering
  • VLSI Design
  • Computer Engineering
  • RTL-to-GDSII implementation
  • Floorplanning
  • Power Grid Design
  • Placement Optimization
  • CTS
  • Routing
  • ECO Implementation
  • Timing Closure
  • Static Timing Analysis (STA)
  • OCV/AOCV/POCV concepts
  • Multi-mode Multi-corner (MMMC) analysis
  • Timing Signoff Closure
  • DRC/LVS
  • Antenna Checks
  • Density Checks
  • LEC awareness
  • UPF/CPF concepts
  • Power gating
  • Multi-voltage methodologies
  • Retention and Isolation strategies
  • Strong scripting skills in:
  • Tcl
  • Perl
  • Python
  • Shell scripting
  • Experience with one or more:
  • ICC2
  • Fusion Compiler
  • PrimeTime
  • StarRC
  • IC Validator
  • Innovus
  • Tempus
  • Voltus
  • Genus
  • Calibre DRC/LVS

Preferred qualifications

  • Experience with advanced technology nodes (16nm/7nm/5nm/3nm).
  • Knowledge of high-performance DDR, CPU, GPU, PCIE, AI/ML, Networking, or Data Center SoCs.
  • Understanding of package and chiplet integration concepts.
  • Experience in hierarchical and full-chip implementation flows.
  • Strong debugging and problem-solving skills.
  • Excellent communication and collaboration abilities.

Benefits and support

  • Compensation and benefits are detailed in the job posting

About AMD

AMD is a global semiconductor company that designs high-performance central processing units (CPUs), graphics processing units (GPUs), and adaptive processors for data centers, personal computers, gaming consoles, and embedded systems. The company specializes in advanced computing solutions and AI accelerators, positioning itself as a major leader in modern high-performance and artificial intelligence hardware. Through strategic developments and acquisitions, AMD continues to expand its ecosystem across cloud infrastructure, enterprise computing, and physical AI.

Industry
Semiconductors
Company size
31000 employees
Founded
1969-05-01
Location
Santa Clara, California, USA
Funding stage
Public Company

Funding

Public Company

  • 2007-11-16Post Ipo

Leadership

DL
Dr. Lisa Su

Chair and Chief Executive Officer

JH
Jean Hu

Executive Vice President, Chief Financial Officer and Treasurer

MP
Mark Papermaster

Executive Vice President and Chief Technology Officer

PG
Philip Guido

Executive Vice President and Chief Commercial Officer

FN
Forrest Norrod

Executive Vice President and General Manager, Data Center Solutions Business Group