NPU AI/Processor Synthesis Engineer- Sr Lead
Qualcomm · Posted Sep 26
Semiconductor, 5G wireless technology, mobile platform, and AI computing solutions
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About the role
The Qualcomm NPU (Neural Processing Unit) design team delivers high-performance AI/ML accelerators for next-generation SoCs on advanced technology nodes. This Synthesis Engineer/Lead role drives RTL-to-GDS synthesis and timing closure for NPU IPs and subsystems, working closely with Architecture, RTL Design, STA, DFT, and Physical Design teams to deliver power-efficient silicon.
What you will do
- Own RTL-to-gate synthesis and timing closure for NPU IPs and subsystems.
- Develop and maintain synthesis flows, constraints, and automation for complex hierarchical designs.
- Drive pre-layout and post-layout timing closure across multiple modes and process corners.
- Optimize designs for PPA (Performance, Power, Area) targets using physical-aware synthesis methodologies.
- Create, validate, and maintain timing constraints (SDC), clock definitions, false paths, and multi-cycle paths.
- Collaborate with RTL, DFT, STA, and Physical Design teams to resolve QoR, timing, power, and convergence issues.
- Perform quality checks including LEC, CDC, lint, and low-power verification.
- Analyze and improve synthesis QoR through scripting and flow enhancements.
- Support tapeout activities and drive continuous improvements in synthesis methodologies.
Skills used in this role
What the employer is looking for
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
- OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
- OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
- Bachelor's or Master's degree in Electrical Engineering, Electronics, Computer Engineering, or related field.
- Strong understanding of ASIC design flow from RTL to GDS.
- Hands-on experience with RTL synthesis, timing closure, and constraint development.
- Expertise in Synopsys Design Compiler/Fusion Compiler or Cadence Genus.
- Strong timing analysis knowledge using PrimeTime.
- Experience with low-power design methodologies and UPF-based flows.
- Good understanding of clocking architecture, timing constraints, and timing signoff.
- Proficiency in TCL and scripting languages such as Python or Perl.
- Excellent debugging, problem-solving, and cross-functional collaboration skills.
Preferred qualifications
- Experience working on AI/ML accelerators, NPU, DSP, GPU, CPU, or other high-performance compute architectures.
- Knowledge of advanced technology nodes (5nm, 4nm, 3nm and below).
- Experience with physical-aware synthesis and hierarchical design methodologies.
- Familiarity with LEC, CDC, lint, power analysis, and low-power verification flows.
- Proven track record of successful SoC or IP tapeouts.
Benefits and support
- Compensation and benefits are detailed in the job posting
About Qualcomm
Qualcomm is a global leader in the development and commercialization of foundational technologies for the wireless industry, including mobile processors, 5G, and on-device artificial intelligence. The company designs and markets digital communications products, semiconductor solutions, and system software used globally across smartphones, automotive solutions, IoT devices, and computing systems. Through extensive R&D and intellectual property licensing, Qualcomm powers a highly interconnected and smarter world.
- Industry
- Semiconductors
- Company size
- 50000+ employees
- Founded
- 1985
- Location
- San Diego, California, USA
- Funding stage
- Public Company
Funding
Public Company · $53M raised
- 2018-11-01Grant
Leadership
President and Chief Executive Officer
Chief Financial Officer and Chief Operating Officer
James H. Thompson
Chief Technology Officer
Chief Marketing Officer
Ann Chaplin
General Counsel and Corporate Secretary
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