Logic Design Engineer
IBM · Posted Oct 21
Hybrid cloud, artificial intelligence, enterprise software, quantum computing, and IT consulting services
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About the role
IBM Infrastructure & Technology designs and operates systems spanning mainframes, hybrid cloud platforms, networking, automation, and site reliability, with emphasis on performance, security, and scalability. This Logic Design Engineer role in Bangalore is a hybrid digital ASIC/processor logic design position. The engineer will define microarchitecture, author RTL, drive design debug and timing closure, review verification plans, and mentor junior engineers.
What you will do
- Define and document microarchitecture for assigned functional blocks, including pipeline structure, data-path organisation, and control logic.
- Author clean, synthesisable RTL in VHDL or SystemVerilog, adhering to team coding guidelines and lint/CDC/RDC cleanliness targets.
- Collaborate with architects to evaluate design alternatives and communicate area, power, and frequency trade-offs.
- Drive design debug across simulation, emulation, and post-silicon environments; develop debug strategies and root-cause RTL or logic issues efficiently.
- Own timing closure for assigned blocks: analyse critical paths, apply SDC constraints, guide ECO strategies, and work with physical design to meet frequency targets.
- Review and sign off on verification plans, ensuring functional coverage goals align with the microarchitectural intent.
- Participate in design reviews and contribute to cross-project lessons-learned to improve team-wide processes.
- Mentor junior engineers on RTL quality, debug methodology, and timing fundamentals.
Skills used in this role
What the employer is looking for
- 5–10 years in digital ASIC or processor logic design, Microarchitecture definition and specification authoring.
- RTL coding in SystemVerilog and/or VHDL
- Static timing analysis (STA) and SDC constraint authoring
- Timing closure — path analysis, ECOs, hold/setup fixing
- Design debug: simulation, waveform analysis, emulation
- Logic synthesis (Synopsys DC, Cadence Genus, or equivalent)
- Lint, CDC, and RDC analysis tools (SpyGlass or equivalent)
- Familiarity with formal verification flows
- Cross-functional collaboration with physical design and DFT
- Experience in high-performance processor, memory subsystem, or high-speed interconnect design (e.g. PCIe, NVLink, OpenCAPI).
- Exposure to power analysis and low-power design techniques (clock gating, power domains, UPF/CPF).
- Post-silicon bring-up and debug experience including lab instrumentation and JTAG-based debug flows.
- Familiarity with emulation platforms (Palladium, Zebu) for pre-silicon debug at speed.
- Track record of driving an RTL block from specification to tapeout on a commercial product.
Benefits and support
- Compensation and benefits are detailed in the job posting
About IBM
International Business Machines Corporation (IBM) is a global technology and consulting company that provides hybrid cloud, artificial intelligence, and enterprise infrastructure solutions. Operating in over 175 countries, IBM helps businesses across industries modernize operations, secure data, and drive digital transformation through platforms like watsonx and Red Hat OpenShift. Founded over a century ago, the company remains a pioneer in high-performance computing, enterprise automation, and quantum technology.
- Industry
- Information Technology
- Company size
- 260,000+ employees
- Founded
- June 16, 1911
- Location
- Armonk, New York, USA
- Funding stage
- Public Company
Funding
Public Company · $3.5B raised
- ·Post Ipo Debt$150M
Leadership
Chairman, President and Chief Executive Officer
Senior Vice President and Chief Financial Officer
Senior Vice President, Software and Chief Commercial Officer
Senior Vice President, IBM Consulting
Senior Vice President, Marketing and Communications
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