Lead FPGA Timing & Characterization Silicon Design Engineer
AMD · Posted Oct 27
High-performance processors, graphics cards, data center solutions, and AI accelerators
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About the role
AMD's FPGA timing and characterization team develops and validates timing models for FPGA devices, supporting silicon correlation and production-quality timing libraries. The role works across FPGA architecture, silicon design, STA, software, and validation, using tools such as Vivado and scripting in Python, Perl, and Tcl. This lead position owns timing characterization methodologies, release planning, QoR analysis, and cross-functional technical leadership for next-generation FPGA timing modeling.
What you will do
- Establish comprehensive validation frameworks for FPGA timing library quality assessment.
- Drive root-cause analysis for timing discrepancies and model inaccuracies.
- Develop and maintain regression suites, DRC checks, and release signoff criteria.
- Drive characterization of FPGA resources
- Develop automation flows to improve FPGA timing quality
- Own planning and execution of Timing Library releases aligned with software release schedules.
- Perform QoR analysis on Vivado software and compare timing results across releases, speed grades, and device generations.
- Coordinate release readiness reviews and manage risk mitigation plans.
- Provide technical status updates to engineering leadership and product stakeholders.
- Serve as the technical authority for FPGA timing library methodologies and releases.
- Drive improvements in prediction accuracy, release quality, and characterization productivity.
- Influence roadmaps, timing methodologies, and next-generation FPGA timing modeling strategies.
- Mentor engineers and establish engineering best practices across the organization.
- Lead technically challenging projects with significant product and customer impact.
Skills used in this role
What the employer is looking for
- MTech or MS in Electronics Engineering.
- 10+ years of experience in FPGA design development & implementation, timing analysis, Silicon characterization
- Strong understanding of:
- FPGA architecture and timing closure
- Static Timing Analysis (STA), PVT variation and timing margins, OCV/POCV methodologies
- Experience with silicon characterization and model generation flows.
- Proficiency in scripting and automation using Python, Perl, Tcl, or similar languages.
- Strong debugging and root-cause analysis skills.
- Familiarity with large-scale flow automation and data analytics.
- Experience with Vivado or Quartus FPGA tools
- Knowledge of silicon correlation and statistical timing techniques.
- Experience leading cross-functional technical initiatives.
Benefits and support
- Compensation and benefits are detailed in the job posting
About AMD
AMD is a global semiconductor company that designs high-performance central processing units (CPUs), graphics processing units (GPUs), and adaptive processors for data centers, personal computers, gaming consoles, and embedded systems. The company specializes in advanced computing solutions and AI accelerators, positioning itself as a major leader in modern high-performance and artificial intelligence hardware. Through strategic developments and acquisitions, AMD continues to expand its ecosystem across cloud infrastructure, enterprise computing, and physical AI.
- Industry
- Semiconductors
- Company size
- 31000 employees
- Founded
- 1969-05-01
- Location
- Santa Clara, California, USA
- Funding stage
- Public Company
Funding
Public Company
- 2007-11-16Post Ipo
Leadership
Chair and Chief Executive Officer
Executive Vice President, Chief Financial Officer and Treasurer
Executive Vice President and Chief Technology Officer
Executive Vice President and Chief Commercial Officer
Executive Vice President and General Manager, Data Center Solutions Business Group
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