Lead DFT Engineer (Scan Insertion | ATPG | MBIST | JTAG)
AMD · Posted Nov 4
High-performance processors, graphics cards, data center solutions, and AI accelerators
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About the role
AMD is a semiconductor company focused on advancing technology, including next-gen processors and AI. The Radeon Technologies Group front-end design/integration team works on cutting-edge silicon designs, collaborating with architecture, IP design, and physical design teams. This Lead DFT Engineer role involves DFT architecture implementation, scan insertion, ATPG, MBIST, JTAG, and post-silicon support to achieve first-pass silicon success.
What you will do
- Implementation and verification of DFT architecture and features
- Scan insertion and ATPG pattern generation
- ATPG patterns verification with gate-level simulation
- Test coverage and test cost reduction analysis
- Post silicon support to ensure successful bring up and enhance yield learning
- Understanding of Design for Test methodologies and DFT verification experience (eg. IEEE1500, JTAG 1149.x, Scan, memory BIST etc.)
- Experience with Mentor testkompress and/or Synopsys Tetramax/DFTMAX
- Experience with VCS simulation tool, Perl/Shell scripting, and Verilog RTL design
- Bachelors or Masters degree in computer engineering/Electrical Engineering with 12+ Years of experience
Skills used in this role
Benefits and support
- Compensation and benefits are detailed in the job posting
About AMD
AMD is a global semiconductor company that designs high-performance central processing units (CPUs), graphics processing units (GPUs), and adaptive processors for data centers, personal computers, gaming consoles, and embedded systems. The company specializes in advanced computing solutions and AI accelerators, positioning itself as a major leader in modern high-performance and artificial intelligence hardware. Through strategic developments and acquisitions, AMD continues to expand its ecosystem across cloud infrastructure, enterprise computing, and physical AI.
- Industry
- Semiconductors
- Company size
- 31000 employees
- Founded
- 1969-05-01
- Location
- Santa Clara, California, USA
- Funding stage
- Public Company
Funding
Public Company
- 2007-11-16Post Ipo
Leadership
Chair and Chief Executive Officer
Executive Vice President, Chief Financial Officer and Treasurer
Executive Vice President and Chief Technology Officer
Executive Vice President and Chief Commercial Officer
Executive Vice President and General Manager, Data Center Solutions Business Group
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