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IP Micro-architect (RTL) design Engineer

Qualcomm · Posted Oct 21

Semiconductor, 5G wireless technology, mobile platform, and AI computing solutions

Bangalore, IndiaFull-timeOnsiteLead/Staff8–15 years₹40.0L–₹70.0L yearly58 applicants
SemiconductorsWireless TechnologyTelecommunicationsArtificial IntelligenceMobile ComputingPublic Company
Full time

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About the role

Qualcomm's Custom IP Team develops next-generation Infrastructure IPs, memory subsystem solutions, and scalable interconnect architectures for high-performance SoCs, covering domains such as NoC, PCIe, CXL, cache coherency, UALink, and AI scale-up interconnect fabrics. The role is a hands-on technical leadership position spanning architecture definition, microarchitecture development, protocol design, RTL implementation, and performance optimization. The engineer will drive complex custom IPs from architectural concept through production silicon while mentoring engineers and influencing architecture decisions.

What you will do

  • Drive architecture and microarchitecture definition of complex custom Infrastructure IPs.
  • Develop detailed microarchitecture specifications including datapath design, control logic, packet formats, flow control, ordering rules, coherency mechanisms, and state machines.
  • Lead RTL development and collaborate closely with verification, physical design, firmware, and SoC integration teams.
  • Evaluate and optimize architecture trade-offs across performance, power, area, scalability, latency, and implementation complexity.
  • Design and develop high-performance interconnect, memory, and protocol-centric IP solutions.
  • Drive design reviews, microarchitecture reviews, and technical decision-making across multiple projects.
  • Support verification planning, debug, emulation, FPGA validation, and silicon bring-up activities.
  • Ensure RTL quality through lint, CDC/RDC, synthesis, and design signoff methodologies.
  • Mentor junior engineers and provide technical leadership within the IP development team.
  • Stay abreast of emerging technologies in AI infrastructure, scale-up fabrics, memory systems, and high-speed interconnects.

Skills used in this role

VerilogSystemVerilogPythonPerlTclGitClearCaseNoCPCIeCXLUALinkASICFPGASynthesisLintCDC/RDCCommunicationProblem Solving

What the employer is looking for

  • 8-15 years of experience in SoC/IP architecture, microarchitecture, and RTL design.
  • Proven experience defining and delivering complex custom IPs from concept through production silicon.
  • Strong experience in architecture and microarchitecture development of one or more of the following: Infrastructure IPs, NoC, interconnect fabrics, memory subsystem IPs, cache coherency solutions, or high-speed interface IPs.
  • Strong understanding of computer architecture, SoC architecture, digital design methodologies, performance modeling and analysis, synchronization and flow control mechanisms, and high-performance data movement architectures.
  • Hands-on RTL design experience using Verilog/SystemVerilog.
  • Experience with design signoff methodologies including lint, CDC/RDC, synthesis, and timing closure fundamentals.
  • Strong debugging, analytical, and problem-solving skills.
  • Excellent verbal and written communication skills.
  • Bachelor's or master's degree in electrical engineering, Computer Engineering, or related field.
  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Preferred qualifications

  • Experience building custom protocol-based IPs from ground-up architecture through silicon validation.
  • Familiarity with AI, Datacenter, Compute, Automotive, Mobile, or XR SoC architectures.
  • Experience with ASIC design and implementation flows.
  • Knowledge of scripting and automation using Python, Perl, or Tcl.
  • Experience with Git, ClearCase, or similar version control systems.
  • Exposure to post-silicon debug and bring-up.

Benefits and support

  • Compensation and benefits are detailed in the job posting

About Qualcomm

Qualcomm is a global leader in the development and commercialization of foundational technologies for the wireless industry, including mobile processors, 5G, and on-device artificial intelligence. The company designs and markets digital communications products, semiconductor solutions, and system software used globally across smartphones, automotive solutions, IoT devices, and computing systems. Through extensive R&D and intellectual property licensing, Qualcomm powers a highly interconnected and smarter world.

Industry
Semiconductors
Company size
50000+ employees
Founded
1985
Location
San Diego, California, USA
Funding stage
Public Company

Funding

Public Company · $53M raised

Western Technology Investment
  • 2018-11-01Grant

Leadership

CR
Cristiano R. Amon

President and Chief Executive Officer

AP
Akash Palkhiwala

Chief Financial Officer and Chief Operating Officer

JH

James H. Thompson

Chief Technology Officer

DM
Don McGuire

Chief Marketing Officer

AC

Ann Chaplin

General Counsel and Corporate Secretary

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