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GPU Physical Design Engineer (Senior/Lead)

Qualcomm · Posted Nov 5

Semiconductor, 5G wireless technology, mobile platform, and AI computing solutions

Bangalore, IndiaFull-timeOnsiteLead/Staff3+ years₹35.0L–₹60.0L yearly<25 applicants
SemiconductorsWireless TechnologyTelecommunicationsArtificial IntelligenceMobile ComputingPublic Company
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About the role

Qualcomm's GPU team is seeking experienced Physical Design Engineers to drive implementation and physical signoff of next-generation high-performance GPU designs. The work spans floorplanning, place and route, CTS, physical verification, timing closure and power optimization in advanced technology nodes using tools such as Synopsys ICC2, Cadence Innovus, PrimeTime and Tempus. The role involves close collaboration with RTL, STA, DFT, Power and SoC teams to achieve aggressive PPA targets and successful tapeouts.

What you will do

  • The role involves close collaboration with RTL, STA, DFT, Power, and SoC teams to achieve aggressive PPA targets and successful tapeouts.

Skills used in this role

What the employer is looking for

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
  • Bachelor's/Master’s degree in Electrical/Electronic Engineering from reputed institution
  • 3+ years of experience in Physical Design/Implementation
  • Physical Implementation activities for high performance GPU Core, which includes Floor-planning, Place and Route, CTS, Formal verification, Physical Verification (DRC/LVS), PDN, Timing Closure and power optimization.
  • Should have good exposure to PD implementation of PPA critical Cores and making right PPA trade-off decisions.
  • Strong expertise in timing convergence of high frequency data-path intensive Cores and advanced STA concepts
  • Well versed with the Block level PnR convergence with Synopsys ICC2/ Cadence Innovus and timing convergence in PTSI/Tempus in latest technology nodes
  • Good understanding of clocking architecture.
  • Should be able work in close collaboration with design, DFT and PNR teams and resolve issues wrt constraints validation, verification, STA, Physical design, etc.
  • Well versed with Tcl/Perl Scripting
  • Experience of working as part of a larger team and working towards project milestones and deadlines; Handle technical deliverables with a small team of engineers.
  • Strong problem-solving skills and good communication skills.

Benefits and support

  • Compensation and benefits are detailed in the job posting

About Qualcomm

Qualcomm is a global leader in the development and commercialization of foundational technologies for the wireless industry, including mobile processors, 5G, and on-device artificial intelligence. The company designs and markets digital communications products, semiconductor solutions, and system software used globally across smartphones, automotive solutions, IoT devices, and computing systems. Through extensive R&D and intellectual property licensing, Qualcomm powers a highly interconnected and smarter world.

Industry
Semiconductors
Company size
50000+ employees
Founded
1985
Location
San Diego, California, USA
Funding stage
Public Company

Funding

Public Company · $53M raised

Western Technology Investment
  • 2018-11-01Grant

Leadership

CR
Cristiano R. Amon

President and Chief Executive Officer

AP
Akash Palkhiwala

Chief Financial Officer and Chief Operating Officer

JH

James H. Thompson

Chief Technology Officer

DM
Don McGuire

Chief Marketing Officer

AC

Ann Chaplin

General Counsel and Corporate Secretary

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