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DSP / NPU Design Verification Sr Staff Engineer

Qualcomm · Posted Oct 14

Semiconductor, 5G wireless technology, mobile platform, and AI computing solutions

Bangalore, IndiaFull-timeOnsiteLead/Staff12+ years₹60.0L–₹95.0L yearly26 applicants
SemiconductorsWireless TechnologyTelecommunicationsArtificial IntelligenceMobile ComputingPublic Company
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About the role

The DSP team at Qualcomm delivers high-performance DSP/NPU cores that sit at the heart of Qualcomm's multi-tier SoC roadmap targeted at mobile, AI, automotive and other markets. Qualcomm is one of the largest fabless semiconductor design companies in the world, generating over $35 Billion in annual revenues from chipsets and royalties from intellectual property. This role drives design verification of complex Qualcomm proprietary DSP/NPU IP, working with a global DSP design team across architecture, implementation, power, post-silicon and back-end teams to build SystemVerilog/UVM testbenches, verification methodologies and automation, and perform IP, subsystem and SoC-level debug including gate-level and power-aware verification.

What you will do

  • Drive design verification of DSP IP by working with a global DSP design team involving architecture, implementation, power, post silicon and back-end teams.
  • Implement and improve System Verilog/UVM Testbench Architecture.
  • Develop and deploy new verification methodologies, automation to continuously improve quality and efficiency.
  • Develop design corresponding test plans, architect and develop verification environments, and meet coverage goals.
  • Hands-on simulations and ability to debug not only IP level, but Subsystem and SoC level fails and bugs.
  • Complete all required verification activities at IP level and ensure high quality commercial success of our products.
  • Assertions, simulation, formal verification (static property checking), HW-SW co-verification, constraint/HVL-based verification, simulation acceleration, emulation are all tools you will use on a daily basis.
  • Responsible gate level simulation bring-up, gate level verification with timing simulations.
  • Responsible for power aware RTL verification and gate level simulation.

Skills used in this role

SystemVerilogUVMOVMSystemCVerilogCAssemblyPerlPythonShellMakeUPFSynopsysMentorCadenceDSPNPURTLSoCformal verificationassertionsemulationgate-level simulationcommunication

What the employer is looking for

  • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
  • Position for 12+ years of experience in design verification of complex Qualcomm propriety DSP/NPU IP
  • 12+ years experience in processor/ASIC design verification
  • Solid background and understanding of Digital Design, Processor Architecture , Processor Verification and Power aware verification.
  • Expertise in System Verilog Testbench Architecture and implementation.
  • Gate-Level Simulation and Debug — 0-delay, timing annotated and power aware.
  • Experience in System Verilog/UVM, and with simulators from Synopsys/Mentor/Cadence .
  • Scripting/Automation Skills — Perl, Python, Shell, Make file TCI .
  • Solid analytical and debugging skills, strong knowledge of digital design and good understanding of Object Oriented Programming (OOP) concepts.
  • Experience in creating validation suite and building automation.
  • Should have excellent inter-personal and communication skills.

Preferred qualifications

  • Experience in writing C based and assembly level testcases is preferred.
  • Exposure to power aware implementation and verification using UPF is a plus.
  • Experience with advanced verification techniques such as formal and assertions is a plus.
  • Experience in Hardware verification languages (HVL) such as SystemVerilog testbench (OVM/UVM) and SystemC and Hardware description languages (HDL) such as Verilog, SystemVerilog is preferred.
  • Experience in verification of Processor subsystems is preferred.

Benefits and support

  • Compensation and benefits are detailed in the job posting

About Qualcomm

Qualcomm is a global leader in the development and commercialization of foundational technologies for the wireless industry, including mobile processors, 5G, and on-device artificial intelligence. The company designs and markets digital communications products, semiconductor solutions, and system software used globally across smartphones, automotive solutions, IoT devices, and computing systems. Through extensive R&D and intellectual property licensing, Qualcomm powers a highly interconnected and smarter world.

Industry
Semiconductors
Company size
50000+ employees
Founded
1985
Location
San Diego, California, USA
Funding stage
Public Company

Funding

Public Company · $53M raised

Western Technology Investment
  • 2018-11-01Grant

Leadership

CR
Cristiano R. Amon

President and Chief Executive Officer

AP
Akash Palkhiwala

Chief Financial Officer and Chief Operating Officer

JH

James H. Thompson

Chief Technology Officer

DM
Don McGuire

Chief Marketing Officer

AC

Ann Chaplin

General Counsel and Corporate Secretary