Director, Physical Design (Custom Silicon Group)
Qualcomm · Posted Oct 11
Semiconductor, 5G wireless technology, mobile platform, and AI computing solutions
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About the role
Qualcomm's Custom Silicon Group develops next-generation, high-performance SoCs for strategic customers. The team covers architecture, RTL design, integration, physical design, verification, silicon bring-up, and production readiness across multiple geographies. This Principal/Director-level ASIC Design Manager role leads the complete silicon development lifecycle, shaping physical design strategy, driving design closure and signoff integrity for timing, power, and area, and serving as a customer-facing engineering leader.
What you will do
- Demonstrate proven experience in executing responsibilities across multiple sites.
- Lead and manage a team across multiple functions.
- Design closure and tapeout expertise in advanced technology nodes.
- Complete ownership of PnR implementation, including Floor planning, Placement, CTS, and post-route activities on the cutting-edge nodes.
- Possess mandatory signoff knowledge, including STA, Power Analysis, FV, Low Power Verification and PV.
- Collaborate effectively to resolve issues related to constraints validation, verification, STA, Physical Design and tapeout
- Understand deep sub-micron design challenges, including leakage power, signal integrity, and DFM.
- Support pre-sales and business development activities by evaluating technical feasibility and providing design expertise.
- Provide technical leadership during design reviews and executive-level customer engagements.
- Drive resolution of customer-reported issues by coordinating across design, verification, firmware, software, and validation teams.
Skills used in this role
What the employer is looking for
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 8+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 7+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
- Bachelor's or Master’s degree in Electrical/Electronics Engineering and 20+ years of Hardware/VLSI Engineering specializing in Physical Design and timing signoff for high-speed SoCs.
Preferred qualifications
- Excellent hands-on experience on Floor planning, PnR and STA flows
- Good knowledge of Placement/Clock Tree Synthesis (CTS), Low Power/High Performance optimization etc.
- Thorough understanding of signoff domains– LEC/CLP/PDN etc.
- 18+ years of experience with Physical Design and timing signoff expertise in latest tech nodes (e.g., 2nm/3nm/4nm/5nm)
Benefits and support
- Compensation and benefits are detailed in the job posting
About Qualcomm
Qualcomm is a global leader in the development and commercialization of foundational technologies for the wireless industry, including mobile processors, 5G, and on-device artificial intelligence. The company designs and markets digital communications products, semiconductor solutions, and system software used globally across smartphones, automotive solutions, IoT devices, and computing systems. Through extensive R&D and intellectual property licensing, Qualcomm powers a highly interconnected and smarter world.
- Industry
- Semiconductors
- Company size
- 50000+ employees
- Founded
- 1985
- Location
- San Diego, California, USA
- Funding stage
- Public Company
Funding
Public Company · $53M raised
- 2018-11-01Grant
Leadership
President and Chief Executive Officer
Chief Financial Officer and Chief Operating Officer
James H. Thompson
Chief Technology Officer
Chief Marketing Officer
Ann Chaplin
General Counsel and Corporate Secretary
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