DFT Integration Lead
AMD · Posted Oct 12
High-performance processors, graphics cards, data center solutions, and AI accelerators
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About the role
The S3 SoC DFx Team at AMD owns DFT (Design for Test) design and integration for complex SoCs, covering structures such as SCAN, ATPG, MBIST, and BSCAN. The work spans ASIC DFT design, synthesis, simulation and verification flows, static timing analysis, and silicon debug in leading process technologies. This role leads DFT design and integration, collaborating with DFT architecture, IP design, RTL, verification, and physical design teams.
What you will do
- As a member of the S3 SoC DFx Team, the successful candidate will own/lead the DFT Design and Integration of cutting edge DFT structures including SCAN, ATPG, MBIST, BSCAN.
- Position includes DFT design development, data analysis and silicon debug of DFT in leading process technologies.
- Strong self-driving ability, should have excellent communication skills (both written and oral)
- Strong problem-solving skills
- Working closely with the DFT Architecture and the various IP Design teams to align on the DFT requirements and successfully implementing the DFT design
- Design and develop correct by construction DFT design and support DFT verification
- Working closely with the RTL designers, Verification Engineers, and PD team to find creative ways to accelerate the identification of functional defects.
Skills used in this role
What the employer is looking for
- B.E/B.Tech/M.E/M.Tech in Electrical/Electronics Engineering
- 11+ years' experience in DFT Design
Preferred qualifications
- Experience and an understanding of ASIC DFT, synthesis, simulation and verification flow
- Experience is End-to-End DFT flow development/creation.
- Expert in Perl, Python, TCL, and ability to create complex flows/scripts.
- Strong EDA tools experience (Tessent, Design Compiler, Spyglass,)
- Experience in DFT architecture for complex chips
- Experience in RTL development using Verilog/System Verilog having worked on RTL for IP and SoC integration
- Proficient in doing basic unit-level verification using simulations.
- Experience with RTL quality check tools/methodologies such as Spyglass, CDC, Lint is required.
- Must have experience with integration of various IPs into complex SOCs.
- Exposure to Static timing analysis & Timing closure is required.
- Scan/ATPG patterns & test flows development, debug, test, and characterization
- Excellent hands-on debug skills and scripting skills are critical.
- Must have good communication skills and the ability to work in a worldwide team environment.
- Knowledge & experience of low power concepts, clock gating, power gating is a plus
- Experience with post-silicon bring up is a plus
Benefits and support
- Compensation and benefits are detailed in the job posting
About AMD
AMD is a global semiconductor company that designs high-performance central processing units (CPUs), graphics processing units (GPUs), and adaptive processors for data centers, personal computers, gaming consoles, and embedded systems. The company specializes in advanced computing solutions and AI accelerators, positioning itself as a major leader in modern high-performance and artificial intelligence hardware. Through strategic developments and acquisitions, AMD continues to expand its ecosystem across cloud infrastructure, enterprise computing, and physical AI.
- Industry
- Semiconductors
- Company size
- 31000 employees
- Founded
- 1969-05-01
- Location
- Santa Clara, California, USA
- Funding stage
- Public Company
Funding
Public Company
- 2007-11-16Post Ipo
Leadership
Chair and Chief Executive Officer
Executive Vice President, Chief Financial Officer and Treasurer
Executive Vice President and Chief Technology Officer
Executive Vice President and Chief Commercial Officer
Executive Vice President and General Manager, Data Center Solutions Business Group
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