Design Verification Engineer, PhD, Early Career
Google · Posted Nov 4
Search engine, cloud computing, software, hardware, and artificial intelligence services
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About the role
Google's Technical Infrastructure team builds and maintains the architecture behind Google's products, from data centers and networks to next-generation platforms. This role sits in AI/ML hardware acceleration, working on TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. The Design Verification Engineer will architect, model, analyze, and design next-generation TPUs, driving design verification strategies, performance and power modeling, and hardware/software codesign with hardware, software, compiler, and research teams.
What you will do
- In this role, you will shape the future of AI/ML hardware acceleration as a Silicon Architect/Design Engineer and drive TPU (Tensor Processing Unit) technology that fuels Google's most demanding AI/ML applications. You will collaborate with hardware and software architects and designers to architect, model, analyze, define and design next-generation TPUs. You will have dynamic, multi-faceted responsibilities in areas such as product definition, design, and implementation, collaborating with the Engineering teams to drive the optimal balance between performance, power, features, schedule, and cost.
- Revolutionize Machine Learning (ML) workload characterization and benchmarking, and propose capabilities and optimizations for next-generation TPUs.
- Develop architecture specifications that meet current and future computing requirements for AI/ML roadmap. Develop architectural and microarchitectural power/performance models, microarchitecture and RTL designs and evaluate quantitative and qualitative performance and power analysis.
- Partner with hardware design, software, compiler, Machine Learning (ML) model and research teams for effective hardware/software codesign, creating high performance hardware/software interfaces.
- Develop and adopt advanced AI/ML capabilities, drive accelerated and efficient design verification strategies and implementations.
- Use AI techniques for faster and optimal physical design convergence -timing, floor planning, power grid and clock tree design etc. Investigate, validate, and optimize DFT, post-silicon test, and debug strategies, contributing to the advancement of silicon bring-up and qualification processes.
Skills used in this role
What the employer is looking for
- PhD degree in Electronics and Communication Engineering, Electrical Engineering, Computer Engineering or related technical field, or equivalent practical experience.
- Experience in programming languages (e.g., C++, Python, Verilog), Synopsys, Cadence tools.
- Experience with accelerator architectures and data center workloads.
Preferred qualifications
- 2 years of experience in Silicon domain post PhD.
- Experience with performance modeling tools.
- Knowledge of arithmetic units, bus architectures, accelerators, or memory hierarchies.
- Knowledge of high performance and low power design techniques.
Benefits and support
- Compensation and benefits are detailed in the job posting
About Google
Google LLC is an American multinational technology company focusing on artificial intelligence, online advertising, search engine technology, cloud computing, computer software, quantum computing, e-commerce, and consumer electronics. As a subsidiary of Alphabet Inc., it is widely recognized for services like Google Search, YouTube, Android, and the Gemini AI ecosystem.
- Industry
- Internet
- Company size
- 180000+ employees
- Founded
- 1998-09-04
- Location
- Mountain View, California, USA
- Funding stage
- Public Company
Funding
Public Company · $25M raised
- 1999-06-07Series A$25M
Leadership
Chief Executive Officer
Senior Vice President and Chief Financial Officer
Senior Vice President and Chief Business Officer
Chief Executive Officer, Google Cloud
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