Design Verification Engineer (Analog/Mixed-Signal Team)
MediaTek · Posted Sep 15
System-on-chip, 5G modem, connectivity, and artificial intelligence semiconductor solutions
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About the role
The Analog/Mixed-Signal Design Verification team works on functional verification for Analog/Mixed-Signal IPs such as SERDES, Sensors and beyond, collaborating with digital design, analog design, and analog behavioral modeling teams. The role applies and advances Digital and AMS Verification methodologies across the entire AMS Functional Verification life cycle, from specification and test planning to coverage closure and post-silicon debugging support, ensuring high quality and high efficiency pre-silicon verification delivery. The engineer will develop scalable, portable test benches, test cases, drivers, checkers, assertions and reference models, run RTL and gate level simulations, and help establish or enhance DV capabilities across AMS IP and Chip DV teams.
What you will do
- Work in AMS IP Design Verification, in UVM-based verification environment.
- Work in DV process from specification to test plan, to configurable test bench, drivers and checkers development, to test suite building to meet functional and code coverage goals
- Apply wide range of Digital and/or AMS DV skills to help and support AMS IP or Chip DV Teams to establish or enhance new or existing DV capabilities, including but not limited to developing scalable and portable Test bench, test cases, drivers, checkers, assertions and reference models, and running RTL and Gate Level simulations and reaching all coverage closures.
- Communicate and collaborate with global architecture, design, verification, and post-Silicon testing teams to address new needs or requirement on DV Support.
- Contribute to continuous improving on AMS DV process for better quality and efficiency through methodology and process improvements.
Skills used in this role
What the employer is looking for
- Quick learner with strong critical thinking and creative problem-solving skills.
- Solid knowledge in ASIC design process, digital design, and UVM-based design verification methodologies.
- Proficient on using design and verification languages: UVM, Verilog, System Verilog, and System Verilog Assertions (SVA).
- Proficient on Design Verification tools and techniques, including test bench development, simulation, debugging and coverage closure, etc.
- Knowledge on Design Verification development process, from specification to test plan, to configurable test bench, drivers, and checkers development, to test suite building to meet functional and code coverage goals
- 3+ years ASIC functional verification hands-on work experience, preferably with some verification experience on analog mixed signal IPs or SERDES IPs, such as USB, UFS, PCIe, DDR-PHY, etc.
Preferred qualifications
- Power-aware simulations and gate level simulations is a plus.
- Scripting and automation skills: Unix/Linux shell programming, Perl, Python, Makefile, and revision management (e.g., Perforce, ClearCase, etc.) is a plus.
- Knowledge of Analog Mixed-Signal Design Fundamentals and analog behavioral modeling is a plus.
- Familiar with programming languages: C, C++, and/or SystemC is a plus.
Benefits and support
- Compensation and benefits are detailed in the job posting
About MediaTek
MediaTek Inc. is a global fabless semiconductor company that designs and distributes tightly-integrated, power-efficient systems-on-chip (SoCs) for mobile devices, home entertainment, connectivity, and IoT. Powering over two billion devices a year, the company is a market leader in mobile processors and custom silicon solutions. MediaTek enables cutting-edge innovation across edge computing, smart homes, and automated driving.
- Industry
- Semiconductors
- Company size
- 17000+ employees
- Founded
- 1997
- Location
- Hsinchu, Taiwan
- Funding stage
- Public Company
Funding
Public Company · $3.5B raised
- 2026-09-01Convertible Bonds$3.5B
Leadership
Ming-Kai Tsai
Chairman
Rick Tsai
Vice Chairman & CEO
Joe Chen
President & COO
David Ku
CFO & Corporate Executive Vice President
Kevin Jou
Chief Technology Officer & Corporate EVP
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