ASIC Engineer || Physical Design
Cisco · Posted Oct 9
Networking, cloud, cybersecurity, and enterprise IT infrastructure services
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About the role
The Cisco SiliconOne team crafts Cisco's Enterprise and Service Provider solutions by developing some of the most complex chips in the industry, offering exposure to silicon, hardware, software, telemetry and security. The Physical Design team in Bangalore, India creates next-generation state-of-the-art networking chips in advanced process nodes. This role drives the backend process through the entire RTL 2 GDS implementation flow, including hierarchical floor planning, place & route, timing closure, power integrity, static timing verification, physical verification and equivalence checks, with special focus on performance and die size optimization.
What you will do
- Our creative and talented Physical Design team in Bangalore, India. As a member of this team, you will be involved in creating next generation state-of-the-art networking chips in advanced process node. You will drive the backend process through the entire RTL 2 GDS Implementation flow including hierarchical floor planning, place & route, timing closure, power integrity, static timing verification, physical verification and equivalence checks, with special focus on performance & die size optimization.
Skills used in this role
What the employer is looking for
- Bachelor's or a Master’s Degree in Electrical or Computer Engineering required with 8+ Years of exp
- All aspects of ASIC Physical implementation including Floor planning, Clock and Power distribution, global signal planning, I/O planning and hard IP integration.
- Hierarchical design implementation approach, Timing closure, physical convergence.
- Work on Automation scripts within STA tools for Methodology development Excellent debugging skills in implementation issues and ability to produce creative solutions.Power Integrity Analysis.
- STA setup, convergence methodology, reviews and sign-off for Multi-Mode and Multi-corner designs.
- Experience with large designs (>100M gates) utilizing state of the art sub 16/14/7/5/3nm technologies.
Preferred qualifications
- Analyzes current generation quality and efficiency gaps to identify proper incremental or evolutionary changes to the existing physical design related Tools, Flow and Methodology.
- Good understanding of different CTS strategies and providing the feedback to Implementation Team.
- As member of physical design team, drive methodologies and “best known methods” to streamline and automate physical design work.
- Good at Timing ECO Implementation strategy development/convergence. Should have an experience in enabling the Tweaker/Primetime based ECO flows.
- Evaluate multiple timing methodologies/tools on different designs and technology nodes.
Benefits and support
- Compensation and benefits are detailed in the job posting
About Cisco
Cisco Systems, Inc. is a worldwide leader in IT, networking, and cybersecurity solutions that transform how people connect, communicate, and collaborate. The company specializes in routing, switching, data center infrastructure, and software-defined networking designed for enterprises of all sizes. Today, Cisco drives major advancements in AI infrastructure, observability, and secure hybrid work platforms.
- Industry
- Networking
- Company size
- 90000+ employees
- Founded
- 1984
- Location
- San Jose, California, USA
- Funding stage
- Public Company
Leadership
Chair and Chief Executive Officer
President and Chief Product Officer
Executive Vice President and Chief Financial Officer
Executive Vice President and Chief People, Policy & Purpose Officer
Executive Vice President and Chief Customer Experience Officer
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