AI Performance Modeling Engineer
AMD · Posted Oct 28
High-performance processors, graphics cards, data center solutions, and AI accelerators
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About the role
AMD builds GPUs and computing products for AI, data centers, PCs, gaming, and embedded systems. This role focuses on AI performance projection and modeling for GPU architecture, predicting how Transformers, LLMs, and large vision models will run before silicon exists. The engineer will build analytical, architectural, and cycle-accurate models, characterize AI workloads, and help shape GPU microarchitecture in collaboration with compiler, runtime, and framework teams.
What you will do
- Build and use models — analytical, architectural, and cycle-accurate — to project the performance of generative AI and LLM workloads (attention, GEMMs, collectives, training and inference, vision models etc) on our GPU architecture.
- Choose the right fidelity for the question: analytical bounds and rooflines for rapid trade-off exploration, architectural and cycle-accurate simulation for precise answers.
- Find where performance will be won or lost — compute-engine occupancy, L1/L2 hierarchy, memory bandwidth, SoC fabric — and quantify the impact of each.
- Characterize AI workloads end to end — trace and profile execution, extract structural footprints, and translate them into microarchitectural bottlenecks and performance bounding boxes.
- Run architecture experiments to evaluate GPU configurations, scaling limits, and trade-offs against real AI workloads, backing every recommendation with sensitivity analysis and data.
- Extend and maintain the cycle-accurate / cycle-approximate simulators for the GPU subsystems AI workloads depend on — compute engines, cache hierarchies, memory subsystems, interconnects.
- Run AI workloads on early silicon, capture telemetry, and correlate results back to your pre-silicon models to sharpen fidelity.
- Root-cause AI performance mismatches on physical silicon using low-level performance counters, register dumps, and Linux tracing.
- Partner with compiler, runtime, and framework teams to turn model insights into optimizations, and to ground your projections in how workloads actually execute.
- Act as the bridge between architecture/RTL and software, translating AI workload requirements into concrete architectural constraints.
- AI workload expertise: Deep, hands-on understanding of LLM and Transformer performance — scaling techniques, parallel training/inference strategies (tensor, pipeline, data parallelism), kernel execution graphs — and how they map to hardware.
- Performance modeling breadth: Hands-on experience with analytical performance models and execution-driven / architectural / cycle-accurate simulators, and sound judgment about which to reach for. Track record of turning models into decisions.
- GPU architecture depth: Strong command of GPU execution pipelines, SIMD/SIMT models, cache hierarchy, memory technologies, and high-bandwidth interconnects (PCIe, custom fabrics).
- Engineering craft: Expert modern C++ and production-grade Python.
- Execution: Excellent structured problem-solving; able to turn noisy simulation data into crisp, actionable findings for engineering stakeholders.
- Nice to have: Experience with NPU / AI-accelerator architecture, or modeling AI workloads on dedicated inference/training accelerators.
Skills used in this role
Benefits and support
- Compensation and benefits are detailed in the job posting
About AMD
AMD is a global semiconductor company that designs high-performance central processing units (CPUs), graphics processing units (GPUs), and adaptive processors for data centers, personal computers, gaming consoles, and embedded systems. The company specializes in advanced computing solutions and AI accelerators, positioning itself as a major leader in modern high-performance and artificial intelligence hardware. Through strategic developments and acquisitions, AMD continues to expand its ecosystem across cloud infrastructure, enterprise computing, and physical AI.
- Industry
- Semiconductors
- Company size
- 31000 employees
- Founded
- 1969-05-01
- Location
- Santa Clara, California, USA
- Funding stage
- Public Company
Funding
Public Company
- 2007-11-16Post Ipo
Leadership
Chair and Chief Executive Officer
Executive Vice President, Chief Financial Officer and Treasurer
Executive Vice President and Chief Technology Officer
Executive Vice President and Chief Commercial Officer
Executive Vice President and General Manager, Data Center Solutions Business Group
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