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PDK Deck Developer

NXP Semiconductors · Posted Oct 23

High-performance mixed-signal and standard semiconductor products for automotive, industrial, and mobile applications

NoidaFull-timeOnsiteLead/Staff15+ years₹60.0L–₹90.0L yearly<25 applicants
SemiconductorsHardwareAutomotiveInternet of ThingsEmbedded SystemsPublic Company
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About the role

NXP's Physical Verification team develops Calibre physical verification decks for CMOS, FinFET, bulk, SOI, RF, BiCMOS and PowerMOS technologies, covering DRC, LVS, PERC, Fill, LPE and shape generation decks and scripts. The role leads the PDK Physical Verification team in Noida, owning PDK planning and release documentation, deck/techFile automation, testing and validation, customer support and tool evaluations. It also drives productivity improvements and adoption of LLM-based AI and recent EDA AI tools such as Calibre AI and Virtuoso AI across technologies.

What you will do

  • Manage and lead Process Design Kit (PDK) Physical Verification (PV) team.
  • PDK PV manager will also create Sciforma plans, PDK planning and release documents as per BCaM7 way of working. Candidate will be responsible to drive PDK PV testing, customer support and tool evaluations.
  • Selected candidate will be responsible for PDK PV development methods and procedures for continuous quality improvement and refine PDK PV specifications and planning.
  • Selected candidate needs to continuously drive PDK PV productivity enhancements and efficiency alignment across technologies using latest AI tools and techniques.
  • Selected candidate needs to work with Cross geographic team to align on way of working and PDK PV release planning alignment.
  • Physical Verification team is responsible for development of Calibre physical verification decks for cmos, FinFET, bulk, SOI, RF, bicmos and powermos technologies including DRC, LVS, PERC, Fill LPE, and shape generation decks and scripts.
  • Development and validation of PV tools and flows using LLM based AI tools, recent EDA AI tools like Calibre AI, Virtuoso AI etc.
  • Development of the Process Design Kit (PDK) infrastructure for PV tools, flows and utilities which includes setups, configurations, integration of technology specific data.
  • Responsibilities will include testing, validation, customer support and new tool/methods evaluations, development of methods and procedures for quality improvement, automation of deck/techFiles generation and validation.

Skills used in this role

CalibreCalibreXRCAssuraAssura RFCadence PVSSynopsys ICVVirtuosoCadence QRCStarRCXTVoltusRedHawkPerlPythonSKILLShellC/C++TclDRCLVSERCPERCLPEEMIRSVRFFinFET

What the employer is looking for

  • Required experience (15+ yrs) with PDK Physical Verification rule deck development/support and/or support of (1) Physical verification rule decks/runsets - DRC/LVS/ERC/PERC/FILL Or (2) Parasitic and EMIR rule decks
  • In depth knowledge of foundry based and EDA tools based process variation formats e.g. ICT, IRCX etc. and understands latest EMIR & EM challenges.
  • Experience with either - Calibre SVRF/TVF rule deck coding OR Cadence PVS/Assura rule deck coding is a must.
  • Experience with some of the following tools is required: Calibre, CalibreXRC, Assura, Assura RF, Cadence PVS, Synopsys ICV, Virtuoso, Cadence QRC, StarRCXT, Voltus, Redhawk.
  • Experience with at least 2 of the following programming languages is a plus: perl, python, skill, shell, c/c++, tcl.
  • BE/B.Tech/ME/M.Tech in Electrical or Electronics Engineering or other similar discipline with at least 15+ years of relevant experience

Benefits and support

  • Compensation and benefits are detailed in the job posting

About NXP Semiconductors

NXP Semiconductors enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better, and safer. As a global semiconductor leader, the company drives innovation in automotive processing, secure connected edge systems, industrial IoT, and mobile communications infrastructure.

Industry
Semiconductors
Company size
32169 employees
Founded
2006
Location
Eindhoven, Netherlands
Funding stage
Public Company

Funding

Public Company

BlackRockFMR LLCVanguardJP Morgan Asset Management

Leadership

RS

Rafael Sotomayor

President and Chief Executive Officer

BB

Bill Betz

Executive Vice President and Chief Financial Officer

LR

Lars Reger

Executive Vice President and Chief Technology Officer

CJ

Chris Jensen

Executive Vice President and Chief People Officer

JW

Jennifer Wuamett

Executive Vice President, General Counsel, and Chief Sustainability Officer

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