
Senior Lead Design Engineer
NXP Semiconductors · Posted Oct 8
High-performance mixed-signal and standard semiconductor products for automotive, industrial, and mobile applications
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About the role
NXP's MCU/MPU Engineering (MME) team is a central engineering organization responsible for developing and delivering Systems-on-Chip (SoCs) for NXP's Automotive, Edge, Radar Processing and Advanced Analog business lines. The SoC Front End team produces design solutions across a wide range of SoCs, from cost-sensitive low-power devices to highly integrated, high-performance, multi-cohort devices compliant with the latest automotive and industrial safety and security standards. This role leads SoC debug, micro-architecture and integration from initial specification through tape-out, driving SoC design methodology and RTL, timing, CDC and RDC signoff with verification, DFT and synthesis teams.
What you will do
- Leading SOC debug , micro-architecture, and integration of the System on Chip (SOC) from initial specification till tape out and beyond
- Drive and implement best SoC design methodology/practices and scale it across different business lines.
- Signing off RTL, timing constraints, CDC, RDC and work with different functions like verification, DFT, synthesis, etc. to get to a production quality Silicon.
- Documenting the SOC design and micro-architecture for usage by other SOC functions
- Provide debug design support for any silicon related debugs of chips in post-silicon phase.
Skills used in this role
What the employer is looking for
- ASIC designers with experiences in all aspects of RTL design flow from Specification/Micro-architecture definition to design.
- Experience with Arm Cortex-M/A/R processor-based SoC debug infrastructure handling
- ARM CoreSight, ETM, STM, DAP, CTI, JTAG, SWD, Trace32, ARM Debug, ARM Trace integration exposure
- Experience: 5-10 Years in IP/SOC design with successful delivery of production quality chips
- Good knowledge of Digital Design and hands-on experience with Verilog RTL coding/integration of debug logic
- Should have a firm understanding and hands-on experience on Chip Assembly, IP Integration, RTL signoff tools and CDC/RDC/Lint/Synthesis.
- Familiarity with Computer architecture: knowledge of microprocessors (ARM, RISC-V), bus protocols preferred (AXI/ACE/APB/ATB). Knowledge on CPU architecture, Core-sight and peripherals like PCIe, USB, DDRs is highly desirable.
- Strong domain knowledge of Clocking, Reset, System modes, debug, interconnect, safety, security and other architectures Know-how of Serial Interfaces, Multimedia, External Bus Interfaces
- Self-motivated to drive issues to closure. Should be a team player and willing to work with cross functional teams on issues resolution.
- Excellent written and verbal communication skill.
- Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components.
Benefits and support
- Compensation and benefits are detailed in the job posting
About NXP Semiconductors
NXP Semiconductors enables secure connections and infrastructure for a smarter world, advancing solutions that make lives easier, better, and safer. As a global semiconductor leader, the company drives innovation in automotive processing, secure connected edge systems, industrial IoT, and mobile communications infrastructure.
- Industry
- Semiconductors
- Company size
- 32169 employees
- Founded
- 2006
- Location
- Eindhoven, Netherlands
- Funding stage
- Public Company
Funding
Public Company
Leadership
Rafael Sotomayor
President and Chief Executive Officer
Bill Betz
Executive Vice President and Chief Financial Officer
Lars Reger
Executive Vice President and Chief Technology Officer
Chris Jensen
Executive Vice President and Chief People Officer
Jennifer Wuamett
Executive Vice President, General Counsel, and Chief Sustainability Officer
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