Senior System Integration and Validation Engineer
NVIDIA · Posted Oct 16
Graphics processing units, artificial intelligence platforms, accelerated computing, and data center solutions
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About the role
The Silicon Co-Design Group (SCG) at NVIDIA sits at the crossroads of architecture, design, marketing, operations, and productization, with work spanning early architecture through final product delivery across Datacenter, Gaming, Robotics, Automotive, and Embedded markets; System Integration is the layer where architecture, design, software, and manufacturing decisions meet reality. This role leads system validation, debug, and cross-functional alignment on one of NVIDIA's flagship silicon programs, covering end-to-end GPU, SoC, and platform validation, PVT and system-stress campaigns, and AI-enabled debug and validation workflows. The engineer partners with globally distributed teams across silicon design, DFT, firmware, software, manufacturing, and platform engineering to find critical silicon and platform issues before they reach the customer.
What you will do
- Own end-to-end system validation of NVIDIA GPU, SoC, and platform programs — feature checks, PVT stress, system-stress campaigns at scale, and multi-unit fleet testing.
- Lead debug of the hardest cross-stack issues — logic, signal integrity, power delivery, firmware, and software interaction — and drive them to root cause with reusable workarounds and productized fixes.
- Develop test plans, scripts, and automation for next-generation chips ahead of physical builds, translating architecture, boot flows, high-speed I/O, and power and thermal dependencies into executable coverage.
- Design and deploy AI-enabled debug and validation workflows used by the team — with explicit guardrails (evals, regression validation, false-positive handling) and measurable impact on cycle time, debug velocity, or escape rate.
- Translate complex silicon and system risk into decision-ready options for technical and executive audiences — without padding or hand-waving.
- Partner with globally distributed teams across silicon design, DFT, firmware, software, manufacturing, and platform engineering — including counterpart engineers in India and other major hubs.
- Lead crisis-mode debug task forces when a program is stuck, and convert the learnings into reusable methodology for adjacent programs.
- Find critical silicon and platform issues before they reach the customer — by shifting validation coverage left with system stress, PVT, and feature-interaction tests that catch escapes before software hardens. Your work shows up in DPPM, escape rate, and ramp confidence.
- Build AI-enabled validation as a real capability, not a demo — by deploying debug, triage, root-cause hypothesis generation, and regression workflows with the evals and guardrails that make them trustworthy enough to gate production decisions.
Skills used in this role
What the employer is looking for
- BTech/BE or MTech/ME in Electronics, Electrical, or Computer Engineering (or equivalent experience), and 6+ years of post-silicon validation, system integration, or platform debug experience on shipped GPU, CPU, or SoC products.
- Hands-on debug depth across silicon, board, and software boundaries — logic design, signal integrity, power delivery, high-speed I/O, and PVT behavior — with strong EE fundamentals across SI/PI, power delivery, and thermal, and a working understanding of GPU, CPU, or SoC architecture across PC, Datacenter, or Automotive.
- At least one specific example of taking an ambiguous, multi-team failure to root-cause closure with a productized fix, and a track record of leading a project team end-to-end through a real crisis with decision points you owned.
- Demonstrated AI-driven validation workflow you built or scaled, not just used — with adoption beyond yourself and measurable impact on debug velocity, coverage, or escape rate. You can describe the guardrails you put in place and where AI is dangerous in your workflow.
Preferred qualifications
- A history of building reusable validation methodology, debug playbooks, or test frameworks that were adopted by other programs or teams — backed by patents, conference papers, invited talks, or recognized contributions.
- Hands-on subsystem depth in HBM, SerDes or high-speed I/O, power and thermal, or advanced packaging — failure modes, debug instrumentation, and the tradeoffs that show up in production.
- Experience partnering deeply with a counterpart team in India or another major engineering hub — examples of shared culture, shared metrics, and shared on-call across geographies.
- AI work that goes beyond personal-copilot use — agentic workflows, RAG-grounded debug assistants, regression bucketing, or automated triage deployed at team scope with adoption metrics.
Benefits and support
- flexible time off
- continuous learning
About NVIDIA
NVIDIA Corporation is a multinational technology company that designs graphics processing units (GPUs) for the gaming and professional markets, as well as system on a chip units (SoCs) for the mobile computing and automotive market. Pioneering accelerated computing, the company has become a driving engine of modern artificial intelligence, deep learning, and data center infrastructure.
- Industry
- Semiconductors
- Company size
- 42000+ employees
- Founded
- April 5, 1993
- Location
- Santa Clara, California, USA
- Funding stage
- Public Company
Funding
Public Company · $5M raised
Leadership
Founder, President and Chief Executive Officer
Executive Vice President and Chief Financial Officer
Founder and NVIDIA Fellow
Executive Vice President, Worldwide Field Operations
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