Senior SOC Design Engineer - Networking Group
NVIDIA · Posted Oct 18
Graphics processing units, artificial intelligence platforms, accelerated computing, and data center solutions
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About the role
NVIDIA's Networking Chip Design team in India is a new, fast-growing group that crafts and implements next-generation DPUs and Switch Silicon chips for high-speed, low-latency communication devices. The team works across SOC design and integration, from architecture and RTL through verification, timing closure and physical design. This role involves defining project milestones, developing system-level methodologies, tools and IPs, and driving cross-functional teams and SOC assembly toward milestone execution.
What you will do
- You are encouraged to understand all features of a given project and define project milestones based on internal roadmaps, assign them and track them through agile framework
- Define and develop system-level methodologies, tools, and IPs to build subsytems in an efficient and scalable manner.
- Work with SOC Assembly team and drive cross-functional teams towards SOC milestone execution.
- Be responsible for integrating all the pieces for a given defined project milestone and deliver the model to relevant teams for further verification at cluster/sub-system/SOC/emulation levels.
Skills used in this role
What the employer is looking for
- BS (or equivalent experience) / MS with 3+ years of practical semiconductor design and architecture experience building complex SoC’s.
- Must have firsthand experience & solid understanding of all phases of SOC development in multiple ASIC projects including ASIC architecture, Micro-Architecture, RTL design, verification, timing closure & Physical design.
- Exposure to design and verification tools (Verilog/SV or equivalent, Cadence or equivalent simulation tools, debug tools like Indago, GDB etc.).
- C/C++ programming or python or any other industry-standard scripting language experience desirable.
- Experience working with software teams to tightly define the HW/SW interface including control/status registers, interrupt and error handling.
- Hands on experience in successful tape outs of multiple sophisticated, high-volume SoCs in advanced process nodes.
- Exposure to various Chip Design Functions to be able to collaborate and tackle sophisticated cross functional problems.
- Excellent verbal and written communication skills to interact with cross functional teams to build consensus.
- Experience in synthesis, physical design and DFT is a plus.
- Experience in RTL Build and Design Automation is a plus.
Preferred qualifications
- Chip lead type of technical leadership experience on delivering complex SOCs for enterprise and/or HPC applications.
- Experience in RTL coding and debug, as well as performance/power/area analysis and trade-offs
- Experience working closely with physical design teams to develop highly optimized ASICs with excellent power, performance and area.
- Prior experience of smartNIC and/or high-speed interconnects.
- Strong coding skills in Perl, Python, or other industry-standard scripting languages.
Benefits and support
- Compensation and benefits are detailed in the job posting
About NVIDIA
NVIDIA Corporation is a multinational technology company that designs graphics processing units (GPUs) for the gaming and professional markets, as well as system on a chip units (SoCs) for the mobile computing and automotive market. Pioneering accelerated computing, the company has become a driving engine of modern artificial intelligence, deep learning, and data center infrastructure.
- Industry
- Semiconductors
- Company size
- 42000+ employees
- Founded
- April 5, 1993
- Location
- Santa Clara, California, USA
- Funding stage
- Public Company
Funding
Public Company · $5M raised
Leadership
Founder, President and Chief Executive Officer
Executive Vice President and Chief Financial Officer
Founder and NVIDIA Fellow
Executive Vice President, Worldwide Field Operations
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