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Verification Engineer

Intel · Posted Nov 3

Semiconductor manufacturing, microprocessors, data center solutions, and artificial intelligence infrastructure

India, BangaloreFull-timeHybridSenior Level6+ years₹30.0L–₹50.0L yearly<25 applicants
SemiconductorsHardwareArtificial IntelligenceCloud ComputingFoundry ServicesPublic Company
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About the role

Intel's ASIC design verification team focuses on next-generation semiconductor product development, using nimble and efficient methodologies to drive at-scale product execution. The team employs coverage-driven verification, formal methods, performance analysis, and SystemVerilog/UVM environments for blocks, subsystems, and SoCs. This role defines verification strategy, leads execution and debugging in the pre-silicon environment, collaborates with SoC, RTL, and physical design teams, and mentors junior engineers.

What you will do

  • Define Project Specific Verification Strategy: Defines and implement scalable and reusable verification plans, test benches, and the verification environments for blocks, subsystems, and SoCs. Ensure meeting the required coverage levels and confirm to microarchitecture specifications.
  • Lead Verification Execution: Create detailed test plans and drives technical reviews with design and architecture teams to validate these plans and proofs.
  • Executes verification plan: Implement and run block/subsystem/cluster/soc simulation models to verify the design, analyze power and performance, and identify bugs.
  • Investigate and Resolve Bugs: Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests.
  • Collaborate Across Teams: Work closely with SoC architects, micro architects, full chip architects, RTL developers, post-silicon, and physical design teams to improve verification of complex architectural and microarchitectural features.
  • Enhance Future Verification Methodologies: Continuously improves existing functional verification infrastructure and methodologies.
  • Absorbs learnings: From post-silicon on the quality of validation done during pre-silicon development, updates test plan for missing coverages and proliferates to future products.
  • Lead and mentor others: inspire and guide junior engineers, fostering their growth and development.

Skills used in this role

What the employer is looking for

  • Bachelor's degree in electrical engineering, computer engineering, computer science, or in other relevant STEM related degree.
  • 6+ years of experience in ASIC/FPGA design verification
  • Strong understanding of object-oriented programming (OOP) principles and their application in SystemVerilog UVM or other verification methodologies.
  • Developing UVM and/or Formal based verification architectures and methodologies.
  • Experience with industry standard protocols (AMBA AXI/AXI-S/CHI and Low-speed communication protocols (UART, SPI, I2C/I3C))
  • Hands-on experience with simulators (Synopsys VCS, Cadence Xcelium, or equivalent).
  • Familiarity with coverage-driven verification, constrained-random testing and strong debugging skills.
  • Experience with scripting languages.

Preferred qualifications

  • Graduate/post-graduate degree in electrical engineering, computer engineering, computer science, or any STEM related degree with overall 8+ yrs. of experience.
  • Skilled in various validation concepts and debug techniques relevant to ASIC/FPGA domain.
  • Collaborative, able to communicate well with counter parts and stakeholders. Strong written and verbal communication skills.
  • Strong analytical ability and problem-solving skills.
  • Experience in defining testbench architecture, constrained random verification methodologies.
  • Experience in processor-based verification using C/C++ with UVM-based verification environments.
  • Define and execute validation of IPs and/or SOC from spec to tape-in including setting verification strategy, creating test bench and components, defining test plan, writing tests, debugging, coverage and analysis.
  • Low power experience (e.g., UPF).
  • Experience in AMBA, CXS stream, DDR, PCIe and/or Ethernet, UCIe protocols.
  • Experience in EDA tools and reusable testbench for subsystem and SoC that deploys 3rd party VIPs.
  • Experience with formal verification techniques and tools is an asset.

Benefits and support

  • Compensation and benefits are detailed in the job posting

About Intel

Intel Corporation is a global technology leader focused on the design and manufacturing of microprocessors, integrated circuits, and advanced data center infrastructure. The company drives innovation across personal computing, artificial intelligence, and cloud ecosystems while operating a major semiconductor foundry business. Intel delivers foundational silicon and packaging solutions that power modern digital infrastructure worldwide.

Industry
Semiconductors
Company size
10001+ employees
Founded
1968
Location
Santa Clara, California, USA
Funding stage
Public Company

Leadership

LT

Lip-Bu Tan

Chief Executive Officer

DZ
David Zinsner

Executive Vice President and Chief Financial Officer

PR

Pushkar Ranade

Chief Technology Officer and Chief of Staff to the CEO

NC
Naga Chandrasekaran

Executive Vice President – Chief Technology and Operations Officer, General Manager Intel Foundry

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