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Silicon Packaging Design Engineer

Intel · Posted Oct 26

Semiconductor manufacturing, microprocessors, data center solutions, and artificial intelligence infrastructure

India, BangaloreContractOnsiteLead/Staff10+ years₹40.0L–₹65.0L yearly<25 applicants
SemiconductorsHardwareArtificial IntelligenceCloud ComputingFoundry ServicesPublic Company
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About the role

The role sits within Intel's packaging design function, defining packaging solutions for integrated circuits while balancing mechanical, thermal, electrical performance and cost. It involves co-design with chip, system, and PCB teams and developing lead frame, substrate, and module designs. The engineer also leads packaging implementation at OSAT or internal assembly sites and supports NPI readiness.

What you will do

  • Define packaging solutions for highly innovative integrated circuits, meeting adequate mechanical, thermal and electrical performance with the goal to achieve lowest package and system level cost.
  • Co-design with chip designer, system engineering and PCB design teams during the development stage to optimize pad layout and pin map for most cost effective package and system.
  • Independently plan, design and develop quality custom lead frame/substrate/module with supporting electrical simulation to reduce cross-talk, IR drop, and noise issues of the device.
  • Technical lead for implementing packaging solutions at OSAT assembly site and/or internal assembly site. Ensure optimized package design which meets the assembly design rules of the selected assembly site. Work with the assembly partner to mitigate any potential risk and improve situation to meet yield target within the project milestone requirement.
  • Co-work with NPI manager to prepare assembly site readiness for continuous uninterrupted flow from wafer fab-out to quality packaged sample meeting the required NPI schedule.
  • Maintain complete set of product specific packaging related drawings, and reports.

Skills used in this role

Siemens XpeditionEDAIC PackagingPackage DesignPCB DesignSignal IntegrityPower IntegrityLead FrameSubstrateWafer BumpingWire BondFlip ChipElectrical SimulationNPICommunicationAnalyticalOrganization

What the employer is looking for

  • Bachelor / Master degree in Electrical Engineering / Mechanical Engineering / Material Science with more than 10 years experience in the field of IC Packaging Design and Layout.
  • Package design experience using Siemens Xpedition EDA tool set is a must.
  • Understand performance and cost trade-offs for different layout and assembly rules.
  • Extensive manufacturing process knowledge regarding wafer bumping, substrate and lead frame manufacturing and assembly of wire bond and flip chip packages is required.
  • Practical knowledge of Signal integrity and Power integrity in PCB design will be an advantage.
  • Possesses good analytical, communication and organization skills.

Benefits and support

  • Compensation and benefits are detailed in the job posting

About Intel

Intel Corporation is a global technology leader focused on the design and manufacturing of microprocessors, integrated circuits, and advanced data center infrastructure. The company drives innovation across personal computing, artificial intelligence, and cloud ecosystems while operating a major semiconductor foundry business. Intel delivers foundational silicon and packaging solutions that power modern digital infrastructure worldwide.

Industry
Semiconductors
Company size
10001+ employees
Founded
1968
Location
Santa Clara, California, USA
Funding stage
Public Company

Leadership

LT

Lip-Bu Tan

Chief Executive Officer

DZ
David Zinsner

Executive Vice President and Chief Financial Officer

PR

Pushkar Ranade

Chief Technology Officer and Chief of Staff to the CEO

NC
Naga Chandrasekaran

Executive Vice President – Chief Technology and Operations Officer, General Manager Intel Foundry

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