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CPU Senior Timing Engineer

Intel Corporation · Posted Oct 21

Semiconductor manufacturing, microprocessor architecture, data center, and artificial intelligence solutions

India, BangaloreFull-timeHybridSenior Level3+ years₹28.0L–₹45.0L yearly<25 applicants
SemiconductorsMicroprocessorsArtificial IntelligenceManufacturingHardwarePublic Company
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About the role

Intel's CPU design and development team engineers high-performance computing solutions, driving designs that power industry-leading technologies. This role focuses on physical design implementation and top-level timing closure for cutting-edge CPU IP across implementation and signoff stages. The engineer will work across design, block timing, physical design, clocking, and integration teams to resolve critical timing issues, improve timing predictability, and support successful tapeout.

What you will do

  • Drive top-level timing analysis and closure for CPU IP across implementation and signoff stages.
  • Develop, review, and maintain timing constraints, MMMC scenarios, path budgets, and timing exceptions for top-level integration.
  • Analyze and resolve setup, hold, clock gating, noise, and cross-block timing issues affecting CPU performance targets.
  • Partner with RTL, block owners, physical design, and clock teams to close critical paths and improve timing convergence.
  • Ensure correlation between block-level, top-level, and signoff timing environments, and track timing risks against project milestones.
  • Develop scripts and methodology improvements to automate timing analysis, reporting, and closure efficiency.

Skills used in this role

Static Timing AnalysisPrimeTimeTempusICC2InnovusTclPythonPerlShell ScriptingMMMCOCV/DeratesCrosstalk AnalysisPhysical DesignRTLDebuggingProblem SolvingCommunication

What the employer is looking for

  • Bachelor's degree in Electrical Engineering, Electronics Engineering, or related field with 4+ years of hands-on experience OR Master's degree in a relevant field with 3+ years of hands-on experience with strong exposure to CPU or high-performance IP timing closure.
  • Strong knowledge of static timing analysis, MMMC flows, timing constraints, OCV/derates, crosstalk, and timing exceptions.
  • Hands-on experience with STA tools such as PrimeTime or Tempus, and familiarity with implementation tools such as ICC2 or Innovus.
  • Proficiency in Tcl and at least one scripting language such as Python, Perl, or shell.
  • Strong debugging, problem-solving, and cross-functional communication skills.

Preferred qualifications

  • Knowledge of scripting languages like Tcl, Perl, or Python for workflow automation in physical design.
  • Proven ability to work effectively in dynamic, cross-geographical, and interdisciplinary teams.
  • Enthusiasm for designing world-class CPUs that drive innovation and empower future technologies.

Benefits and support

  • Compensation and benefits are detailed in the job posting

About Intel Corporation

Intel Corporation is an American multinational technology company and a premier global semiconductor chip manufacturer. It designs and produces advanced microprocessors, central processing units (CPUs), and integrated technologies that power personal computers, data centers, cloud infrastructure, and artificial intelligence frameworks. Through its expanding Intel Foundry business, the company also provides cutting-edge wafer fabrication and packaging solutions for global customers.

Industry
Semiconductors
Company size
10001+ employees
Founded
1968-07-18
Location
Santa Clara, California, USA
Funding stage
Public Company

Funding

Public Company

Glynn CapitalNvidia
  • 2025-12-30Post IPO

Leadership

LT
Lip-Bu Tan

Chief Executive Officer

DZ

David Zinsner

Chief Financial Officer

NC

Naga Chandrasekaran

Executive Vice President, Chief Technology and Operations Officer

AB

Aparna Bawa

Executive Vice President, Chief Legal & People Officer

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