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Chassis IP Design Engineer

Intel · Posted Oct 14

Semiconductor manufacturing, microprocessors, data center solutions, and artificial intelligence infrastructure

India, BangaloreFull-timeHybridSenior Level3+ years₹25.0L–₹45.0L yearly<25 applicants
SemiconductorsHardwareArtificial IntelligenceCloud ComputingFoundry ServicesPublic Company
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About the role

The Central Engineering Group (CEG) is Intel's innovation hub designing foundational technologies integrated across Intel's product portfolio, and within it the UIC Fabric Design organization develops reusable IP blocks and subsystems that enhance system-level capabilities. The work is centered on high-performance IP and SoC logic design for computing products. This role involves writing and optimizing RTL for IP blocks, meeting power, performance, area and timing goals, and collaborating with architecture, verification, physical design, and SoC integration teams.

What you will do

  • Design and develop RTL code for IP blocks, ensuring functionality, quality, and scalability.
  • Optimize logic designs to meet power, performance, area, and timing objectives.
  • Collaborate with architecture teams to define microarchitecture features of IP designs.
  • Participate in verification plan reviews and implement corrective measures for failing RTL tests.
  • Support SoC integration teams to ensure high-quality integration and verification of IP blocks.
  • Work with physical design teams to address timing and implementation challenges.
  • Drive compliance with quality assurance standards for seamless IP-SoC handoff.

Skills used in this role

VerilogSystemVerilogLintCDCRDCRTLSoCAMBACHIAXIAHBAPBPCIeCXLQoSRASSimulationMicroarchitecturePhysical DesignAI ToolsCommunication

What the employer is looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field with 4+ years of experience in state-of-the-art SoC or IP design OR Master's degree with 3+ years of experience.
  • Proficiency in Verilog/System Verilog, including Lint/CDC/RDC tools and methodologies.
  • Demonstrated ability to optimize designs for power, performance, and area trade-offs (PPA).

Preferred qualifications

  • Familiarity with AMBA (CHI, AXI, AHB, APB) and PCIe/CXL protocols.
  • Experience in designing IP subsystems, including protocol conversion bridges and debug/trace components.
  • Understanding of concepts such as QoS, access control, flow control, RAS, and security/error handling.
  • Proven ability to collaborate across architecture, verification, and SoC integration teams effectively.
  • Familiarity with using AI tools to assist logic design.
  • Strong communication skills and experience working with globally distributed teams across time zones.

Benefits and support

  • Compensation and benefits are detailed in the job posting

About Intel

Intel Corporation is a global technology leader focused on the design and manufacturing of microprocessors, integrated circuits, and advanced data center infrastructure. The company drives innovation across personal computing, artificial intelligence, and cloud ecosystems while operating a major semiconductor foundry business. Intel delivers foundational silicon and packaging solutions that power modern digital infrastructure worldwide.

Industry
Semiconductors
Company size
10001+ employees
Founded
1968
Location
Santa Clara, California, USA
Funding stage
Public Company

Leadership

LT

Lip-Bu Tan

Chief Executive Officer

DZ
David Zinsner

Executive Vice President and Chief Financial Officer

PR

Pushkar Ranade

Chief Technology Officer and Chief of Staff to the CEO

NC
Naga Chandrasekaran

Executive Vice President – Chief Technology and Operations Officer, General Manager Intel Foundry